SAB 82525
SAB 82526
SAF 82525
SAF 82526
6.7 Special RTS Function
Beyond the regular RTS function, signifying the transmission of a frame (Request To Send),
the RTS output may be programmed for a special function via SOC1, SOC0 bits in the CCR2
register, provided the serial channel is operating in a bus configuration in clock mode 0, 1, or 5.
– If SOC1, SOC0 bits are set to ’11’; the RTS output is active (= low) during the
reception of a frame.
– If SOC1, SOC0 bits are set to ’10’; the RTS output function is disabled and the RTS
pin remains always high.
6.8 Test Mode
To provide for fast and efficient testing, the HSCX can be operated in the test mode by setting
the TLP bit in the MODE register.
The on-chip serial input and output (T×DA – R×DA, T×DB – R×DB) are connected generating
a local loopback.
R×DA and R×DB input is ignored. T×DA and T×DB remain active.
As a result, the user can perform a self-test of the HDLC channels of the HSCX.
Semiconductor Group
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