SAB 82525
SAB 82526
SAF 82525
SAF 82526
Channel Configuration Register 2 (READ/WRITE)
Value after RESET: 00
H
The meaning of the individual bits in CCR2 depends on the selected clock mode via
CCR 1 as follows:
CCR2
clock mode 0,1
clock mode 2,6
clock mode 3,7
clock mode 5
clock mode 4
SOC1 SOC0
0
0
TSS
0
0
CIE
CIE
CIE
CIE
CIE
RIE
RIE
RIE
RIE
RIE
DIV
DIV
DIV
DIV
DIV
(2C/6C)
BR9
BR9
BR8
BR8
BDF
BDF
TIO
TIO
TIO
TIO
SOC1 SOC0 XCS0 RCS0
SOC1 SOC0
0
0
SOC1, SOC0 … Special Output Control
In a bus configuration (selected via CCR1) the function of pin RTS can be defined
00 … RTS output is activated during the transmission of a frame.
10 … RTS output is always high (RTS disabled).
11 … RTS indicates the reception of a data frame (active low).
In point-to-point configuration (selected via CCR1) the T × D and R × D pins may be flipped
0X … data is transmitted on T × D, received on R × D pin (normal case)
1X … data is transmitted on R × D, received on T × D pin
BR9, BR8 … Baudrate, Bit 9-8 (higher significant bits, refer to description of BGR
register).
BDF … Baudrate Division Factor
0 … The division factor of the baudrate generator is set to 1 (constant).
1 … The division factor is adjusted with BR9 – BR0 bits of CCR2 and BRG register.
TSS … Transmit Clock Source Select
0 … The transmit clock is input to the T × CLKA/T × CLKB pins.
1 … The transmit clock is derived from the baudrate generators output divided by 16.
TIO … Transmit Clock Input Output Switch
0 … T × CLKA, T × CLKB pins are inputs
1 … T × CLKA, T × CLKB pins are outputs
Semiconductor Group
100
SIEMENS [ Siemens Semiconductor Group ]
