IRFR/U2405
4000
V
GS
, Gate-to-Source Voltage (V)
3200
V
GS
= 0V,
f = 1MHz
C
iss
= C
gs
+ C
gd ,
C
ds
SHORTED
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
20
I
D
= 34A
V
DS
= 44V
V
DS
= 27V
V
DS
= 11V
16
C, Capacitance (pF)
2400
Ciss
12
1600
8
800
Coss
Crss
4
0
1
10
100
0
0
20
40
FOR TEST CIRCUIT
SEE FIGURE 13
60
80
100
V
DS
, Drain-to-Source Voltage (V)
Q
G
, Total Gate Charge (nC)
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
I
SD
, Reverse Drain Current (A)
I
D
, Drain Current (A)
100
100
10us
T
J
= 175
°
C
100us
10
1ms
T
J
= 25
°
C
10
1
0.4
V
GS
= 0 V
0.8
1.2
1.6
2.0
2.4
1
1
T
C
= 25 ° C
T
J
= 175 ° C
Single Pulse
10
10ms
100
V
SD
,Source-to-Drain Voltage (V)
V
DS
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
4 / 10
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