SC1480
POWER MANAGEMENT
Applications Information (Cont.)
Thermal Considerations
The error comparator offset is trimmed so that it trips
when VOUT is 1.25 volts +/-1% at room temperature.
This offset does not drift significantly with supply and
temperature. Thus, the error comparator contributes 1%
or less to DC system inaccuracy.
The junction temperature of the device may be calculated
as follows:
TJ = TA + PD • θJA °C
Where:
The on pulse in the SC1480 is calculated to give a pseudo
fixed frequency. Nevertheless, some frequency variation
with line and load can be expected. This variation changes
the output ripple voltage. Because constant on regulators
regulate to the valley of the output ripple, ½ of the output
ripple appears as a DC regulation error. For example, if
REFOUT=1.25 volts, then the valley of the output ripple
will be 1.25 volts. If the ripple is 20mv with VIN=6, then
the DC output voltage will be 1.26 volts. If the ripple is
40mv with VIN=25 volts, then the DC output voltage will
be 1.27 volts. The best way to minimize this effect is to
minimize the output ripple.
TA = ambient temperature (°C)
PD = power dissipation in (W)
θJA = thermal impedance junction to ambient from
absolute maximum ratings (°C/W)
The power dissipation may be calculated as follows:
PD = VCCA • IVCCA + Vg • Qg • f
W
Where:
VCCA = chip supply voltage (V)
IVCCA = operating current (A)
Vg = gate drive voltage, typically 5V (V)
Qg = FET gate charge, from the FET datasheet (C)
f = switching frequency (kHz)
To compensate for valley regulation it is usually desirable
to use passive droop. Take the feedback directly from
the output side of the inductor incorporating a small
amount of trace resistance between the inductor and
output capacitor. This trace resistance should be
optimized so that at full load the output droops to near
the lower regulation limit. Passive droop minimizes the
required output capacitance because the voltage
excursions due to load steps are reduced. Passive droop
also improves stability so it should be used when possible.
Inserting the following values as an example:
TA = 85°C
θJA = 100°C/W
VCCA = 5V
IVCCA = 1100µA (data sheet maximum)
Vg = 5V
Qg = 60nC
f = 300kHz
gives us:
−6
−9
TJ = 85 +
(
5 • 1100 • 10 + 5 • 60 • 10 • 300 • 103
• 100 = 95 °C
)
As can be seen, the heating effects due to internal power
dissipation are practically negligible, thus requiring no
special consideration thermally during layout.
2006 Semtech Corp.
13
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