SFP70N06
Fig. 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
V
DS
_
I
S
L
Driver
R
G
Same Type
as DUT
V
DD
V
GS
• dv/dt controlled by R
G
• I
S
controlled by pulse period
V
GS
( Driver )
Gate Pulse Width
D = --------------------------
Gate Pulse Period
10V
I
FM
, Body Diode Forward Current
I
S
( DUT )
I
RM
di/dt
Body Diode Reverse Current
V
DS
( DUT )
Body Diode Recovery dv/dt
V
f
V
DD
Body Diode
Forward Voltage Drop
6/7
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