E0C88862
s
BASIC EXTERNAL CONNECTION DIAGRAM
q
When piezoelectric buzzer is driven with single terminal and LCD panel is driven with 1/5 bias power supply
LCD panel 41 x 32
SEG0
SEG40
COM0
N.C.
∗2
C
G1
X'tal1
∗1
V
SS
V
OSC
OSC1
OSC2
OSC3
OSC4
COM31
R
CR1
K00
K01
K02
K03
K04
K05
K06
K07
K10
R26 (TOUT)
R27 (TOUT)
R51 (BZ)
P10 (SIN)
P11 (SOUT)
P12 (SCLK)
P13 (SRDY)
P14
P15
P16
P17
∗4
C
G2
X'tal2 or
Ceramic
C
D2
Rf
C
1
C
2
C
3
C
4
C
5
C
6
C
7
C
8
C
9
C
10
∗3
R
CR3
V
D1
V
C1
V
C2
V
C3
V
C4
V
C5
CA
CB
CC
CD
CE
CF
CG
RESET
E0C88862
[The potential of the substrate
(back of the chip) is V
SS
.]
Cres
3V
V
DD
TEST
Piezo
Coil
Recommended values for external parts
Symbol
Name
X'tal1 Crystal oscillator
C
G1
Trimmer capacitor
R
CR1
Resistor for CR oscillation
X'tal2 Crystal oscillator
Ceramic Ceramic oscillator
Feedback resistor
Rf
Gate capacitor
C
G2
C
D2
Drain capacitor
Recommended value
32.768 kHz, CI (Max.)=35 kΩ
5–25 pF
800 kΩ
4.9152 MHz
4 MHz
1 MΩ
15 pF (Crystal osciilation)
30 pF (Ceramic osciilation)
15 pF (Crystal osciilation)
30 pF (Ceramic osciilation)
Symbol
Name
R
CR3
Resistor for CR oscillation
Capacitor between V
SS
and V
D1
C
1
C
2
Capacitor between V
SS
and V
C1
C
3
C
4
C
5
C
6
Capacitor between V
SS
and V
C2
Capacitor between V
SS
and V
C3
Capacitor between V
SS
and V
C4
Capacitor between V
SS
and V
C5
Recommended value
20 kΩ
0.1
µF
0.1
µF
0.1
µF
0.1
µF
0.1
µF
0.1
µF
0.1
µF
3.3
µF
0.47
µF
R50 (BZ)
-
C
P
+
C
7
–C
10
Booster/reducer capacitors
Capacitor for power supply
C
P
Cres
Capacitor for RESET terminal
∗
The connection diagram shown above is an example of when mask option settings are as follows:
LCD power source: Internal power supply (1/5 bias), RESET terminal: With pull-up resistor,
R51 specification: General-purpose output port
∗1
OSC1 = Crystal oscillation,
∗2
OSC1 = CR oscillation,
∗3
OSC3 = Crystal/Ceramic oscillation,
∗4
OSC3 = CR oscillation
Note: The above table is simply an example, and is not guaranteed to work.
9
SEIKO [ SEIKO EPSON CORPORATION ]
