E0C88862
q
SVD Circuit
(Unless otherwise specified: V
DD
=1.8~5.5V, V
SS
=0V, Ta=25°C)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit Note
SVD voltage
V
SVD
Level 1
→
Level 0
1.82
V
1
Level 2
→
Level 1
2.00
V
1
Level 3
→
Level 2
2.18
V
1
Level 4
→
Level 3
2.36
V
2
Typ×0.92 2.54 Typ×1.08
Level 5
→
Level 4
V
2
Level 6
→
Level 5
2.72
V
2
Level 7
→
Level 6
2.90
V
3
Level 8
→
Level 7
3.08
V
3
Level 9
→
Level 8
3.26
V
3
Level 10
→
Level 9
3.45
V
4
Level 11
→
Level 10
3.65
V
4
Level 12
→
Level 11
3.85
V
4
Typ×0.88
Typ×1.12
Level 13
→
Level 12
4.05
V
4
Level 14
→
Level 13
4.25
V
4
Level 15
→
Level 14
4.50
V
4
V
SVD (Level 0)
<
V
SVD (Level 1)
<
V
SVD (Level 2)
<
V
SVD (Level 3)
<
V
SVD (Level 4)
<
V
SVD (Level 5)
<
V
SVD (Level 6)
<
V
SVD (Level 7)
<
V
SVD (Level 8)
<
V
SVD (Level 9)
<
V
SVD (Level 10)
<
V
SVD (Level 11)
<
V
SVD (Level 12)
<
V
SVD (Level 13)
<
V
SVD (Level 14)
<
V
SVD (Level 15)
Note) 1 Low power operating mode only
2 Low power operating mode or Normal operating mode only
3 Normal operating mode only
4 Normal operating mode or High speed operating mode only
q
Current Consumption
(Unless otherwise specified: V
DD
=Within the operating voltage in each operating mode, V
SS
=0V, Ta=25°C, OSC1=32.768kHz crystal oscillation,
C
G
=25pF, OSC3=Crystal/ceramic oscillation, Non heavy load protection mode, C
1
to C
10
=0.1µF, No panel load)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit Note
∗1
0.3
1
Power current
I
DD1
In SLEEP status
µA
∗2
1.5
4
I
DD2
(Normal mode)
In HALT status
µA
∗3
9
15
I
DD3
CPU is in operating (32.768kHz)
µA
∗4
1.1
1.5
I
DD4
CPU is in operating (4MHz)
mA
∗1
0.2
1
I
DD1
Power current
In SLEEP status
µA
∗2
1
3
I
DD2
(Low power mode)
In HALT status
µA
∗3
5
8
I
DD3
CPU is in operating (32.768kHz)
µA
∗1
1
3
I
DD1
Power current
In SLEEP status
µA
∗2
2
6
I
DD2
(High speed mode)
In HALT status
µA
∗3
13
22
I
DD3
CPU is in operating (32.768kHz)
µA
∗5
3.7
4.9
I
DD4
CPU is in operating (8MHz)
mA
2.5
5
I
LCDN
1
LCD drive circuit current
µA
23
30
I
LCDH
In heavy load protection mode
2
µA
30
60
I
SVDN
V
DD
= 3.0V
3
SVD circuit current
µA
3
20
I
CR1
R
CR1
= 800kΩ
4
OSC1 CR oscillation current
µA
OSC3: Stop,
CPU, ROM, RAM: SLEEP status,
Clock timer: Stop,
Others: Stop status
∗1
OSC1: Stop,
CPU, ROM, RAM: HALT status,
Clock timer: Operating, Others: Stop status
∗2
OSC1: Oscillating, OSC3: Stop,
CPU, ROM, RAM: Operating in 32.768 kHz, Clock timer: Operating, Others: Stop status
∗3
OSC1: Oscillating, OSC3: Stop,
Clock timer: Operating, Others: Stop status
∗4
OSC1: Oscillating, OSC3: Oscillating, CPU, ROM, RAM: Operating in 4 MHz,
Clock timer: Operating, Others: Stop status
∗5
OSC1: Oscillating, OSC3: Oscillating, CPU, ROM, RAM: Operating in 8 MHz,
Note) 1 The LCD drive circuit current varies according to the display patterns.
2 It is the value of current which flows in the heavy load protection circuit when in the heavy load protection mode
(OSC3 ON or buzzer ON).
3 The value in
x
V can be found by the following expression: I
SVDN
(V
DD
=
x
V) = (x
×
20) - 30 (Typ. value),
I
SVDN
(V
DD
=
x
V) = (x
×
30) - 30 (Max. value)
4 When OSC1 CR oscillation circuit is selected by the mask option.
6
SEIKO [ SEIKO EPSON CORPORATION ]
