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E0C88308F 参数 Datasheet PDF下载

E0C88308F图片预览
型号: E0C88308F
PDF下载: 下载PDF文件 查看货源
内容描述: [8-BIT, MROM, 8.2MHz, MICROCONTROLLER, PQFP16, PLASTIC, QFP-160]
分类和应用: 时钟外围集成电路
文件页数/大小: 9 页 / 90 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C88308
s
ELECTRICAL CHARACTERISTICS
q
Absolute Maximum Ratings
Symbol
Condition
Power voltage
V
DD
Liquid crystal power voltage
V
C5
Input voltage
V
I
Output voltage
V
O
High level output current
1 terminal
I
OH
Total of all terminals
Low level output current
I
OL
1 terminal
Total of all terminals
Permitted loss
P
D
Operating temperature
Topr
Storage temperature
Tstg
Note) 1 Case that to Nch open drain output by the mask option is included.
2 In case of plastic package.
Rating
Value
-0.3 to +7.0
-0.3 to +7.0
-0.3 to V
DD
+ 0.3
-0.3 to V
DD
+ 0.3
-5
-20
5
20
200
-40 to +85
-65 to +150
(V
SS
= 0V)
Unit Note
V
V
V
1
V
mA
mA
mA
mA
2
mW
°C
°C
q
Recommended Operating Conditions
Condition
Operating power voltage
(Normal mode)
Operating power voltage
(Low power mode)
Operating power voltage
(High speed mode)
Operating frequency
(Normal mode)
(V
SS
= 0V, Ta = -40 to 85°C)
Symbol
Remark
Min.
Typ.
Max.
Unit Note
V
DD
2.4
5.5
V
V
DD
1.8
3.5
V
V
DD
3.5
5.5
V
3
f
OSC1
V
DD
= 2.4 to 5.5V
30
32.768
50
kHz
3
f
OSC3
0.03
4.2
MHz
3
Operating frequency
(Low power mode)
f
OSC1
V
DD
= 1.8 to 3.5V
30
32.768
50
kHz
3
Operating frequency
(High speed mode)
f
OSC1
V
DD
= 3.5 to 5.5V
30
32.768
50
kHz
3
f
OSC3
0.03
8.2
MHz
4
V
C5
V
C4
V
C3
V
C2
V
C1
V
SS
Liquid crystal power voltage
V
C5
6.0
V
Capacitor between V
D1
and V
SS
C1
0.1
µF
5
C2
0.1
µF
Capacitor between V
C1
and V
SS
5
C3
0.1
µF
Capacitor between V
C2
and V
SS
5
C4
0.1
µF
Capacitor between V
C3
and V
SS
5
C5
0.1
µF
Capacitor between V
C4
and V
SS
5
C6
0.1
µF
Capacitor between V
C5
and V
SS
5
C7
0.1
µF
Capacitor between CA and CB
5
C8
0.1
µF
Capacitor between CA and CC
5
C9
0.1
µF
Capacitor between CD and CE
6
R1
100
kΩ
Resistor between V
C1
and V
SS
Note) 3 When an external clock is input from the OSC1 terminal by the mask option, do not connect anything to the OSC2 terminal,
and when an external clock is input from the OSC3 terminal, do not connect to the OSC4 terminal.
4 When external power supply is selected by the mask option.
5 When LCD drive power is not used, the capacitor is not necessary. In this case, do not connect anything to V
C1
to V
C5
and CA to
CE terminals.
6 It is necessary when the panel load is large and for 1/32 duty driving. The resistance value should be decided by connecting it to
the actual panel to be used.
q
DC Characteristics
(Unless otherwise specified: V
DD
= 1.8 to 5.5V, V
SS
= 0V, Ta = -40 to 85°C)
Symbol
Condition
Min.
Typ.
Max.
Unit Note
0.8V
DD
V
IH1
Kxx, Pxx, MCU/MPU
V
V
DD
V
IL1
0
0.2V
DD
Kxx, Pxx, MCU/MPU
V
7
1.6
V
IH2
V
DD
OSC1, OSC3
V
7
1.0
V
IH2
V
DD
OSC1
V
7
2.4
V
IH2
V
DD
OSC1, OSC3
V
7
0
V
IL2
0.6
OSC1, OSC3
V
7
0
0.3
V
IL2
OSC1
V
7
0
0.9
V
IL2
OSC1, OSC3
V
0.5V
DD
0.9V
DD
V
T+
RESET
V
V
T-
0.1V
DD
0.5V
DD
RESET
V
I
OH
Pxx, Rxx, V
OH
= 0.9V
DD
-0.5
mA
mA
I
OL
Pxx, Rxx, V
OL
= 0.1V
DD
0.5
1
µA
-1
I
LI
Kxx, Pxx, RESET, MCU/MPU
1
µA
-1
Pxx, Rxx
I
LO
8
500
kΩ
100
Kxx, Pxx, RESET, MCU/MPU
R
IN
15
pF
Kxx, Pxx, V
IN
= 0V, f = 1MHz, Ta = 25°C
C
IN
-5
µA
I
SEGH
SEGxx, COMxx, V
SEGH
= V
C5
-0.1V
µA
5
I
SEGL
SEGxx, COMxx, V
SEGL
= 0.1V
Note) 7 When external clock is selected by mask option.
8 When addition of pull-up resistor is selected by mask option.
Characteristic
High level input voltage (1)
Low level input voltage (1)
High level input voltage (2) (Normal mode)
High level input voltage (2) (Low power mode)
High level input voltage (2) (High speed mode)
Low level input voltage (2) (Normal mode)
Low level input voltage (2) (Low power mode)
Low level input voltage (2) (High speed mode)
High level schmitt input voltage
Low level schmitt input voltage
High level output current
Low level output current
Input leak current
Output leak current
Input pull-up resistance
Input terminal capacitance
Segment/Common output current
5