E0C88308
s
PIN DESCRIPTION
Pin name
V
DD
V
SS
V
D1
V
C1
–V
C5
CA–CE
OSC1
OSC2
OSC3
OSC4
MCU/MPU
K00–K07
K10/EVIN
R00–R07
/A0–A7
R10–R17
/A8–A15
R20–R22
/A16–A18
R23/RD
R24/WR
R25/CL
R26/FR
R27/TOUT
R30–R33
/CE0–CE3
R34/FOUT
R50/BZ
P00–P07/D0–D7
P10/SIN
P11/SOUT
P12/SCLK
P13/SRDY
P14/CMPP0
P15/CMPM0
P16/CMPP1
P17/CMPM1
COM0–COM15
COM16–COM31
/SEG56–SEG41
SEG0–SEG40
RESET
TEST
∗
147–159,
2–20, 22–30
84
83
I
I
Initial reset input terminal
Test input terminal
O
145
146
104–111
103
102
101
100
99
98
97
96
65–62, 60–49
48–42, 39–31
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
Output port (R34) terminal or clock (FOUT) output terminal
Output port (R50) terminal or buzzer (BZ) output terminal
I/O port (P00–P07) terminals or data bus (D0–D7)
I/O port (P10) terminal or serial I/F data input (SIN) terminal
I/O port (P11) terminal or serial I/F data output (SOUT) terminal
I/O port (P12) terminal or serial I/F clock (SCLK) I/O terminal
I/O port (P13) terminal or serial I/F ready signal (SRDY) output terminal
I/O port (P14) terminal or comparator 0 non-inverted input terminal
I/O port (P15) terminal or comparator 0 inverted input terminal
I/O port (P16) terminal or comparator 1 non-inverted input terminal
I/O port (P17) terminal or comparator 1 inverted input terminal
LCD common output terminals
LCD common output terminals (when 1/32 duty is selected)
or LCD segment output terminal (when 1/16 or 1/8 duty is selected)
LCD segment output terminals
135
136
137
138
139
140, 142–144
O
O
O
O
O
O
Output port (R23) terminal or read signal (RD) output terminal
Output port (R24) terminal or write signal (WR) output terminal
Output port (R25) terminal or LCD synchronous signal (CL) output terminal
Output port (R26) terminal or LCD frame signal (FR) output terminal
Output port (R27) terminal
or programmable timer underflow signal (TOUT) output terminal
Output port (R30–R33) terminals or chip enable (CE0–CE3) output terminals
132–134
O
Output port (R20–R22) terminals or address bus (A16–A18)
Pin No.
79
80
78
75–71
70–66
81
82
76
77
85
88–95
87
114–119,
122, 123
124–131
O
Output port (R10–R17) terminals or address bus (A8–A15)
In/Out
–
–
–
O
–
I
O
I
O
I
I
I
O
Power supply (+) terminal
Power supply (GND) terminal
Regulated voltage output terminal for oscillators
LCD drive voltage output terminals
Booster capacitor connection terminals for LCD
OSC1 oscillation input terminal
(select crystal oscillation/CR oscillation/external clock input with mask option)
OSC1 oscillation output terminal
OSC3 oscillation input terminal
(select crystal/ceramic/CR oscillation/external clock input with mask option)
OSC3 oscillation output terminal
Terminal for setting MCU or MPU modes
Input port (K00–K07) terminal
Input port (K10) terminal or event counter external clock (EVIN) input terminal
Output port (R00–R07) terminals or address bus (A0–A7)
Function
∗
TEST is the terminal used for outgoing inspection of the IC. For normal operation be sure it is connected to V
DD
.
4
SEIKO [ SEIKO EPSON CORPORATION ]
