E0C6S48
■ BASIC EXTERNAL CONNECTION DIAGRAM
LCD PANEL 51 × 16
SIN
SERIAL
DEVICE
SOUT
SCLK
R00–R03
R10–R13
R20–R23
R30–R33
R40
P00–P03
P10–P13
P20–P23
P30–P33
OUTPUT
DATA
I/O
DATA
R41
E0C6S48
FOUT
Buzzer
R42
R43
VREF
VSS
[The potential of the substrate
(back of the chip) is VDD.]
K00–K03
K10–K13
INPUT
DATA
N.C.
RESET
+
TEST
VDD
Rfc
Rfx
C3
C2
C1
C7
C6
C5 C4 C8
Ceramic
X'tal
CDC
CGC
CGX
POWER
3–5 V
RCR2
RCR1
Mask option
X'tal
Rfx
CGX
(RCR1)
Crystal oscillator 32.768 kHz, CI(Max)=35 kΩ
Feedback resistor 10 MΩ
Trimmer capacitor 5–25 pF
Resistor for OSC1 1.6 MΩ (32 kHz Typ.)
CR oscillation
C1 Booster capacitor (1)
C2 Booster capacitor (2)
C3 Booster capacitor (3)
C4 Capacitor between VDD and VL1 0.1µF
C5 Capacitor between VDD and VL2 0.1µF
C6 Capacitor between VDD and VL4 0.1µF
C7 Capacitor between VDD and VL5 0.1µF
C8 Capacitor between VDD and VS1 0.1µF
0.1µF
0.1µF
0.1µF
1
1
1
1
1
1
1
1 When the load on the liquid crystal system
is large, increase the capacitance of the
voltage booster capacitors (C1–C3) and
the capacitors between VDD and liquid
crystal system power (C4–C7).
Ceramic Ceramic oscillator 500 kHz–2 MHz
Rfc
CGC
CDC
Feedback resistor 1 MΩ
Gate capacitor
Drain capacitor
100 pF
100 pF
(RCR2)
Resistor for OSC3 20 kΩ–100 kΩ (VSC=2)
CR oscillation 40 kΩ–100 kΩ (VSC=1)
Note: The above table is simply an example, and is not guaranteed to work.
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© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
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421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
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Phone : 042-587-5814 FAX : 042-587-5110