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E0C63P366D 参数 Datasheet PDF下载

E0C63P366D图片预览
型号: E0C63P366D
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, FLASH, 4.1MHz, MICROCONTROLLER, UUC102, DIE-100]
分类和应用: 时钟外围集成电路
文件页数/大小: 18 页 / 127 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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PF1052-02
E0C63P366
4-bit Single Chip Microcomputer
q
Function Evaluation Flash built-in
q
Compatible with E0C63358 and 158
q
On-board writing supported
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DESCRIPTION
The E0C63P366 is a CMOS 4-bit microcomputer composed of a 4-bit CMOS core CPU, rewritable ROM
(Flash), RAM, segment LCD driver, serial interface and timers. The E0C63P366 has a built-in large-capacity
Flash ROM (16K
×
13 bits) and a RAM (2,048
×
4 bits), and is upper compatible with the E0C63358 and
E0C63158. The E0C63P366 can be used as a MTP (Multi-Time Programming) when developing programs.
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FEATURES
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CMOS LSI 4-bit parallel processing ..... E0C63000 core CPU
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OSC1 oscillation circuit ......................... 32.768kHz (Typ.) crystal oscillation
q
OSC3 oscillation circuit ......................... 1.8MHz (Typ.) CR oscillation / 4MHz (Max.) ceramic oscillation (∗1)
q
Instruction set ........................................ Basic instruction : 46 types (411 instructions with all)
Addressing mode : 8 types
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Instruction execution time ..................... During operation at 32.768kHz : 61µsec (Min.)
During operation at 4MHz
: 0.5µsec (Min.)
q
ROM (Flash) capacity ........................... Code ROM
: 16,384 words
×
13 bits
Segment option ROM : 2,048 words
×
4 bits
Programming method : Parallel and serial programming
q
RAM capacity ........................................ Data memory
Display memory
: 2,048 words
×
4 bits
: 32 words
×
4 bits
q
Input port ............................................... 9 bits 8 bits (with pull-up resistors)
1 bit (for key position sensing interrupt by A/D)
q
Output port ............................................ 12 bits (2 special outputs are available
∗2)
q
I/O port .................................................. 20 bits (4 serial inputs/outputs are available
∗2)
(4 A/D inputs are available
∗2)
q
Serial interface ...................................... 1 port (8-bit clock synchronous system)
q
LCD driver ............................................. 32 segments
×
4 / 3 / 2 commons (∗2), 1/3 bias drive
q
Time base counter ................................ 1 line (Clock timer)
q
Programmable timer ............................. Built-in (8 bits
×
2 ch. or 16 bits
×
1 ch.)
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Watchdog timer ..................................... Built-in
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A/D converter ........................................ 8-bit resolution
Maximum error : ±3LSB, A/D clock : OSC1, OSC3 (2.7V to 5.5V)
q
Buzzer output ........................................ Buzzer frequency : 2kHz or 4kHz (∗2), 2Hz interval output (∗2)
q
Supply voltage detection (SVD) circuit .. 2.7V or 2.8V (∗2)
q
Interrupts ............................................... External : Input port interrupt
Key sensing interrupt
Internal : Clock timer interrupt
Programmable timer interrupt
Serial interface interrupt
A/D converter interrupt
2 lines
1 line
4 lines
2 lines
1 line
1 line
1