E0C63558
s
BASIC EXTERNAL CONNECTION DIAGRAM
LCD panel 40
×
17
HS
Input
K00–K03
K10–K13
P00–P03
P10 (SIN)
P11 (SOUT)
P12 (SCLK)
P13 (SRDY)
P20
P21
P22 (CL)
P23 (FR)
P30–P33
COM0
|
COM16
SEG0
|
SEG39
SVD
CA
CB
CC
TEST
V
DD
AV
DD
V
D1
C
1
C
2
I/O
C
3
C
GX
X'tal
+
C
P
E0C63558
[The potential of the substrate
(back of the chip) is V
SS
.]
OSC1
OSC2
OSC3
CR
Piezo
Coil
V
REF
CDIN
BPOUT
TIP
RING
FB
RDIN
RDRC
DP
TONE
0.2µ
0.1µ
1000p
1000p
270k
0.1µ
10k
10k
C
4
C
5
C
6
Speech
Network
Hook Switch
ON
OFF
TIP
RING
Rectifier
Protection
Network
470k
0.2µ
0.2µ
33k
C
7
V
C1
V
C23
V
C4
V
C5
R00 (XBZ)
R01 (BZ)
R02 (TOUT)
R03 (FOUT)
R10 (XTMUTE)
R11 (XRMUTE)
R12 (HDO)
R13 (HFO)
R20–R23
C
GC
C
DC
OSC4
RESET
AV
SS
V
SS
C
RES
3V
X'tal
C
GX
CR
C
GC
C
DC
C
1
–C
7
C
P
C
RES
Crystal oscillator
Trimmer capacitor
Ceramic oscillator
Gate capacitor
Drain capacitor
Capacitor
Capacitor
RESET terminal capacitor
32.768 kHz, C
I
(Max.) = 34 kΩ
5–25 pF
3.58 MHz
30 pF
30 pF
0.2
µF
10
µF
0.1
µF
Note: The above table is simply an example, and is not guaranteed to work.
11
SEIKO [ SEIKO EPSON CORPORATION ]
