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E0C63558F 参数 Datasheet PDF下载

E0C63558F图片预览
型号: E0C63558F
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 3.6MHz, MICROCONTROLLER, PQFP128, QFP15-128]
分类和应用: 时钟外围集成电路
文件页数/大小: 12 页 / 114 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C63558
q
Analog Circuit Characteristics and Current Consumption
(Unless otherwise specified: V
DD
=3.0V, V
SS
=0V, f
OSC1
=32.768kHz, C
G
=25pF, Ta=-20 to 70°C, V
D1
/V
C1
/V
C23
/V
C4
/V
C5
are internal voltage, C
1
–C
7
=0.2µF)
Condition
Characteristic
Symbol
Min.
Typ.
Max. Unit
Connect 1 MΩ load resistor between V
SS
and V
C1
LCD drive voltage
V
C1
1/2·V
C23
1/2·V
C23
V
(without panel load)
-0.1
×0.95
V
C23
Connect 1 MΩ load resistor
LC0–3="0"
1.95
LC0–3="1"
between V
SS
and V
C23
1.98
(without panel load)
LC0–3="2"
2.01
LC0–3="3"
2.04
LC0–3="4"
2.07
LC0–3="5"
2.10
LC0–3="6"
2.13
LC0–3="7"
Typ.
Typ.
2.16
V
LC0–3="8"
×0.88
×1.12
2.19
LC0–3="9"
2.22
LC0–3="10"
2.25
LC0–3="11"
2.28
LC0–3="12"
2.31
LC0–3="13"
2.34
LC0–3="14"
2.37
LC0–3="15"
2.40
V
C4
Connect 1 MΩ load resistor between V
SS
and V
C4
3/2·V
C23
3/2·V
C23
V
(without panel load)
×0.95
V
C5
2·V
C23
V
Connect 1 MΩ load resistor between V
SS
and V
C5
2·V
C23
(without panel load)
×0.95
V
SVD1
SVDS0–3="0" (internal)
2.20
SVD voltage
SVDS0–3="1"
2.20
(Ta=25°C)
SVDS0–3="2"
2.20
SVDS0–3="3"
2.20
SVDS0–3="4"
2.20
SVDS0–3="5"
2.30
SVDS0–3="6"
2.40
SVDS0–3="7"
Typ.
2.50
Typ.
V
SVDS0–3="8"
×0.93
2.60
×1.07
SVDS0–3="9"
2.70
SVDS0–3="10"
2.80
SVDS0–3="11"
2.90
SVDS0–3="12"
3.00
SVDS0–3="13"
3.10
SVDS0–3="14"
3.20
SVDS0–3="15"
3.30
3
V
SVD2
SVDS0–3="0" (external), Ta = 25°C
0.85
0.95
1.05
V
SVD voltage (external)
SVD circuit response time
t
SVD
Ta = 25°C
100
µS
During HALT
I
OP
LCD power OFF
1
,
2
Current consumption
1.5
3
µA
1
,
2
(32 kHz crystal oscillation)
LCD power ON
(Ta=25°C)
4
8
µA
During execution
LCD power ON
1
,
2
10
19
µA
(32 kHz crystal oscillation)
During HALT
LCD power ON
1
150
300
µA
(3.58 MHz ceramic oscillation)
During execution
LCD power ON
1
600
800
µA
(3.58 MHz ceramic oscillation)
SVD circuit current (during supply voltage detection)
1
15
µA
V
DD
=2.2 to 5.5 V
SVD circuit current (during external voltage detection)
0.5
6
µA
V
DD
=2.2 to 5.5 V
DTMF circuit current V
DD
=5.5 V
4
1.4
2.5
mA
4
DTMF circuit current V
DD
=3.0 V
1.2
2.0
mA
4
FSK circuit current V
DD
=5.5 V
1.8
2.5
mA
4
FSK circuit current V
DD
=3.0 V
1.0
1.5
mA
∗1:
Without panel load. The SVD circuit is OFF.
∗2:
OSCC = "0"
∗3:
Please input the voltage, which is within the range between V
SS
and V
DD
, into the SVD terminal.
∗4:
OSC3 oscillation current and CPU operating current with a 3.58 MHz clock are included.
6