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E0C6282F 参数 Datasheet PDF下载

E0C6282F图片预览
型号: E0C6282F
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 0.032768MHz, MICROCONTROLLER, PQFP80, PLASTIC, QFP-80]
分类和应用: 时钟外围集成电路
文件页数/大小: 9 页 / 102 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C6282
E0C62L82 (Heavy Load Protection Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage, C1–C6=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
-0.95
Connect 1MΩ load resistor between V
DD
and V
L1
Internal voltage
V
L1
-1.15
-1.05
V
(without panel load)
2•V
L1
Connect 1MΩ load resistor between V
DD
and V
L2
V
L2
2•V
L1
V
(without panel load)
-0.1
×0.85
Connect 1MΩ load resistor between V
DD
and V
L3
3•V
L1
3•V
L1
V
L3
V
(without panel load)
-0.1
×0.85
Connect 1MΩ load resistor between V
DD
and V
L4
4•V
L1
4•V
L1
V
L4
V
(without panel load)
-0.1
×0.85
-1.30
-1.10
V
SVD
SVD voltage
-1.20
V
100
t
SVD
SVD circuit response time
µS
Noninverted input (CMPP)
V
SS
+0.3
V
DD
-0.9
Analog comparator
V
IP
V
Inverted input (CMPM)
input voltage
V
IM
Analog comparator
20
V
OF
mV
offset voltage
Analog comparator
1
t
CMP
V
IP
=-1.1V, V
IM
=V
IP
±30mV
mS
response time
Current consumption
2.5
6.0
During HALT
*
1
I
OP1
Without panel load
µA
7.0
12.0
OSC1 is crystal oscillation
During operation
*
1
µA
11.5
20.5
Without panel load
I
OP2
During HALT
*
1
µA
16.5
27.0
OSC1 is CR oscillation
During operation
*
1
µA
∗1:
The SVD circuit and analog voltage comparator are turned OFF.
E0C62A82 (Normal Operating Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage, C1–C6=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
0.5•V
L2
Connect 1MΩ load resistor between V
DD
and V
L1
Internal voltage
V
L1
0.5•V
L2
V
(without panel load)
-0.1
+0.1
V
L2
Connect 1MΩ load resistor between V
DD
and V
L2
-2.25
-1.95
-2.10
V
(without panel load)
3•V
L1
3•V
L1
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
V
(without panel load)
-0.1
×0.9
Connect 1MΩ load resistor between V
DD
and V
L4
4•V
L1
4•V
L1
V
L4
V
(without panel load)
-0.1
×0.9
-2.55
-2.25
V
SVD
SVD voltage
-2.40
V
100
t
SVD
SVD circuit response time
µS
Noninverted input (CMPP)
V
SS
+0.3
V
DD
-0.9
Analog comparator
V
IP
V
Inverted input (CMPM)
V
IM
input voltage
Analog comparator
10
V
OF
mV
offset voltage
Analog comparator
1
t
CMP
V
IP
=-1.5V, V
IM
=V
IP
±15mV
mS
response time
Current consumption
1.70
3.0
During HALT
*
1
I
OP1
Without panel load
µA
4.0
7.0
During operation at 32kHz
*
1
OSC1 is crystal
µA
150.0
300.0
During operation at 1MHz
*
2
oscillation
µA
30
60
Without panel load
I
OP2
During HALT
*
1
µA
30
60
During operation at 32kHz
*
1
OSC1 is CR oscillation
µA
160
300
µA
During operation at 1MHz
*
2
∗1:
The OSC3 circuit, SVD circuit and analog voltage comparator are turned OFF.
∗2:
The SVD circuit and analog voltage comparator are turned OFF.
E0C62A82 (Heavy Load Protection Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage, C1–C6=0.1µF)
Max.
Condition
Characteristic
Symbol
Min.
Typ.
Unit
0.5•V
L2
Connect 1MΩ load resistor between V
DD
and V
L1
Internal voltage
V
L1
0.5•V
L2
V
(without panel load)
-0.1
+0.1
V
L2
Connect 1MΩ load resistor between V
DD
and V
L2
-2.25
-1.95
-2.10
V
(without panel load)
3•V
L1
3•V
L1
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
V
(without panel load)
-0.1
×0.9
Connect 1MΩ load resistor between V
DD
and V
L4
4•V
L1
4•V
L1
V
L4
V
(without panel load)
-0.1
×0.9
-2.55
-2.25
V
SVD
SVD voltage
-2.40
V
100
t
SVD
SVD circuit response time
µS
Noninverted input (CMPP)
V
SS
+0.3
V
DD
-0.9
Analog comparator
V
IP
V
Inverted input (CMPM)
V
IM
input voltage
Analog comparator
10
V
OF
mV
offset voltage
Analog comparator
1
t
CMP
V
IP
=-1.5V, V
IM
=V
IP
±15mV
mS
response time
Current consumption
11.7
33.0
During HALT
*
1
I
OP1
Without panel load
µA
14.0
37.0
During operation at 32kHz
*
1
OSC1 is crystal
µA
160.0
330.0
During operation at 1MHz
*
2
oscillation
µA
40
90
Without panel load
I
OP2
During HALT
*
1
µA
40
90
During operation at 32kHz
*
1
OSC1 is CR oscillation
µA
200
420
µA
During operation at 1MHz
*
2
∗1:
The OSC3 circuit, SVD circuit and analog voltage comparator are turned OFF.
∗2:
The SVD circuit and analog voltage comparator are turned OFF.
6