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E0C6282F 参数 Datasheet PDF下载

E0C6282F图片预览
型号: E0C6282F
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 0.032768MHz, MICROCONTROLLER, PQFP80, PLASTIC, QFP-80]
分类和应用: 时钟外围集成电路
文件页数/大小: 9 页 / 102 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C6282
q
Analog Circuit Characteristics and Current Consumption
E0C6282 (Normal Operating Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage, C1–C6=0.1µF)
Unit
Characteristic
Symbol
Condition
Min.
Typ.
Max.
V
Internal voltage
V
L1
Connect 1MΩ load resistor between V
DD
and V
L1
0.5•V
L2
0.5•V
L2
(without panel load)
-0.1
+0.1
V
V
L2
Connect 1MΩ load resistor between V
DD
and V
L2
-2.25
-2.10
-1.95
(without panel load)
V
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
3•V
L1
3•V
L1
(without panel load)
-0.1
×0.9
V
V
L4
Connect 1MΩ load resistor between V
DD
and V
L4
4•V
L1
4•V
L1
(without panel load)
-0.1
×0.9
V
SVD voltage
V
SVD
-2.55
-2.40
-2.25
µS
SVD circuit response time
t
SVD
100
V
Analog comparator
V
IP
Noninverted input (CMPP)
V
SS
+0.3
V
DD
-0.9
input voltage
V
IM
Inverted input (CMPM)
mV
Analog comparator
V
OF
10
offset voltage
mS
Analog comparator
t
CMP
V
IP
=-1.5V, V
IM
=V
IP
±15mV
1
response time
µA
Current consumption
I
OP1
During HALT
*
1
Without panel load
1.5
3.0
µA
During operation
*
1
OSC1 is crystal oscillation
4.0
7.0
1
µA
I
OP2
During HALT
*
Without panel load
6.0
10.5
During operation
*
1
µA
OSC1 is CR oscillation
8.7
14.0
∗1:
The SVD circuit and analog voltage comparator are turned OFF.
E0C6282 (Heavy Load Protection Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage, C1–C6=0.1µF)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
Internal voltage
V
L1
Connect 1MΩ load resistor between V
DD
and V
L1
0.5•V
L2
0.5•V
L2
V
(without panel load)
-0.1
+0.1
V
L2
Connect 1MΩ load resistor between V
DD
and V
L2
-2.25
-2.10
-1.95
V
(without panel load)
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
3•V
L1
3•V
L1
V
(without panel load)
-0.1
×0.9
V
L4
Connect 1MΩ load resistor between V
DD
and V
L4
4•V
L1
4•V
L1
V
(without panel load)
-0.1
×0.9
SVD voltage
V
SVD
-2.55
-2.40
-2.25
V
SVD circuit response time
t
SVD
100
µS
Analog comparator
V
IP
Noninverted input (CMPP)
V
SS
+0.3
V
DD
-0.9
V
input voltage
V
IM
Inverted input (CMPM)
Analog comparator
V
OF
10
mV
offset voltage
Analog comparator
t
CMP
V
IP
=-1.5V, V
IM
=V
IP
±15mV
1
mS
response time
Current consumption
I
OP1
During HALT
*
1
Without panel load
11.5
33.0
µA
During operation
*
1
OSC1 is crystal oscillation
14.0
37.0
µA
I
OP2
During HALT
*
1
Without panel load
16.0
40.5
µA
1
During operation
*
OSC1 is CR oscillation
18.7
44.0
µA
∗1:
The SVD circuit and analog voltage comparator are turned OFF.
E0C62L82 (Normal Operating Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L4
are internal voltage, C1–C6=0.1µF)
Characteristic
Symbol
Condition
Min.
Typ.
Max.
Unit
Internal voltage
V
L1
Connect 1MΩ load resistor between V
DD
and V
L1
-1.15
-1.05
-0.95
V
(without panel load)
V
L2
Connect 1MΩ load resistor between V
DD
and V
L2
2•V
L1
2•V
L1
V
(without panel load)
-0.1
×0.9
V
L3
Connect 1MΩ load resistor between V
DD
and V
L3
3•V
L1
3•V
L1
V
(without panel load)
-0.1
×0.9
V
L4
Connect 1MΩ load resistor between V
DD
and V
L4
4•V
L1
4•V
L1
V
(without panel load)
-0.1
×0.9
SVD voltage
V
SVD
-1.30
-1.20
-1.10
V
SVD circuit response time
t
SVD
100
µS
Analog comparator
V
IP
Noninverted input (CMPP)
V
SS
+0.3
V
DD
-0.9
V
input voltage
V
IM
Inverted input (CMPM)
Analog comparator
V
OF
20
mV
offset voltage
Analog comparator
t
CMP
V
IP
=-1.1V, V
IM
=V
IP
±30mV
1
mS
response time
Current consumption
I
OP1
During HALT
*
1
Without panel load
1.5
3.0
µA
During operation
*
1
OSC1 is crystal oscillation
4.0
7.0
µA
I
OP2
During HALT
*
1
Without panel load
6.0
10.5
µA
During operation
*
1
OSC1 is CR oscillation
8.7
14.0
µA
∗1:
The SVD circuit and analog voltage comparator are turned OFF.
5