E0C6008
E0C60L08 (Normal Operating Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Characteristic
Max. Unit
Symbol
Min.
Typ.
Condition
LCD drive voltage
V
V
L1
Connect 1 MΩ load resistor between V
DD
and V
L1
-1.15 -1.05 -0.95
(without panel load)
2·V
L1
V
V
L2
Connect 1 MΩ load resistor between V
DD
and V
L2
2·V
L1
(without panel load)
- 0.1
×0.9
V
V
L3
Connect 1 MΩ load resistor between V
DD
and V
L3
3·V
L1
3·V
L1
(without panel load)
- 0.1
×0.9
BLD voltage
∗1
V
-1.15 -1.05 -0.95
V
B0
BLC="0"
V
-1.20 -1.10 -1.00
V
B1
BLC="1"
V
-1.25 -1.15 -1.05
V
B2
BLC="2"
V
-1.30 -1.20 -1.10
V
B3
BLC="3"
V
-1.35 -1.25 -1.15
V
B4
BLC="4"
V
-1.40 -1.30 -1.20
V
B5
BLC="5"
V
-1.45 -1.35 -1.25
V
B6
BLC="6"
V
-1.50 -1.40 -1.30
V
B7
BLC="7"
100
µsec
BLD circuit response time
t
B
V
-1.30 -1.20 -1.10
Sub-BLD voltage
V
BS
100
µsec
Sub-BLD circuit response time
t
BS
Non-inverted input (AMPP)
V
SS
+0.3
V
DD
-0.9 V
Analog comparator
V
IP
input voltage
V
IM
Inverted input (AMPM)
mV
Analog comparator
20
V
OF
offset voltage
msec
Analog comparator
3
t
AMP
V
IP
=-1.1V
response time
V
IM
=V
IP
±30mV
µA
Current consumption
1.0
2.0
I
OP
During HALT
Without
∗2
µA
2.2
4.0
During operation
panel load
∗1:
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
∗2:
The BLD circuit, sub-BLD circuit and analog comparator are in the OFF status.
E0C60L08 (Heavy Load Protection Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Condition
Characteristic
Min.
Typ.
Max. Unit
Symbol
LCD drive voltage
-1.15 -1.05 -0.95
V
V
L1
Connect 1 MΩ load resistor between V
DD
and V
L1
(without panel load)
2·V
L1
V
L2
Connect 1 MΩ load resistor between V
DD
and V
L2
2·V
L1
V
(without panel load)
- 0.1
×0.85
V
L3
Connect 1 MΩ load resistor between V
DD
and V
L3
3·V
L1
3·V
L1
V
(without panel load)
- 0.1
×0.85
BLD voltage
∗1
-1.15 -1.05 -0.95
V
B0
BLC="0"
V
V
B1
BLC="1"
-1.20 -1.10 -1.00
V
V
B2
BLC="2"
-1.25 -1.15 -1.05
V
V
B3
BLC="3"
-1.30 -1.20 -1.10
V
V
B4
BLC="4"
-1.35 -1.25 -1.15
V
V
B5
BLC="5"
-1.40 -1.30 -1.20
V
V
B6
BLC="6"
-1.45 -1.35 -1.25
V
V
B7
BLC="7"
-1.50 -1.40 -1.30
V
BLD circuit response time
t
B
100
µsec
Sub-BLD voltage
V
BS
-1.30 -1.20 -1.10
V
Sub-BLD circuit response time
t
BS
100
µsec
Analog comparator
V
IP
Non-inverted input (AMPP)
V
SS
+0.3
V
DD
-0.9 V
input voltage
V
IM
Inverted input (AMPM)
Analog comparator
V
OF
20
mV
offset voltage
t
AMP
V
IP
=-1.1V
Analog comparator
3
msec
V
IM
=V
IP
±30mV
response time
I
OP
During HALT
Without
Current consumption
6.5
10
µA
panel load
During operation
∗2
8.5
15
µA
∗1:
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
∗2:
The BLD circuit and sub-BLD circuit are in the ON status (HLMOD="1", BLS="0").
The analog comparator is in the OFF status.
8
SEIKO [ SEIKO EPSON CORPORATION ]
