E0C6008
q
Analog Circuit Characteristics and Current Consumption
E0C6008 (Normal Operating Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Characteristic
Max. Unit
Symbol
Min.
Typ.
Condition
LCD drive voltage
1/2·V
L2
V
V
L1
Connect 1 MΩ load resistor between V
DD
and V
L1
1/2·V
L2
(without panel load)
- 0.1
×0.9
V
V
L2
Connect 1 MΩ load resistor between V
DD
and V
L2
-2.30 -2.10 -1.90
(without panel load)
3/2·V
L2
3/2·V
L2
V
V
L3
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
- 0.1
×0.9
∗1
BLD voltage
V
-2.35 -2.20 -2.05
V
B0
BLC="0"
V
-2.40 -2.25 -2.10
V
B1
BLC="1"
V
-2.45 -2.30 -2.15
V
B2
BLC="2"
V
-2.50 -2.35 -2.20
V
B3
BLC="3"
V
-2.55 -2.40 -2.25
V
B4
BLC="4"
V
-2.60 -2.45 -2.30
V
B5
BLC="5"
V
-2.65 -2.50 -2.35
V
B6
BLC="6"
V
-2.70 -2.55 -2.40
V
B7
BLC="7"
100
µsec
BLD circuit response time
t
B
V
-2.55 -2.40 -2.25
Sub-BLD voltage
V
BS
100
µsec
Sub-BLD circuit response time
t
BS
Non-inverted input (AMPP)
V
SS
+0.3
V
DD
-0.9 V
Analog comparator
V
IP
input voltage
V
IM
Inverted input (AMPM)
mV
Analog comparator
10
V
OF
offset voltage
msec
Analog comparator
3
t
AMP
V
IP
=-1.5V
response time
V
IM
=V
IP
±15mV
µA
Current consumption
1.0
2.0
I
OP
During HALT
Without
µA
2.2
4.0
During operation
∗2
panel load
∗1:
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
∗2:
The BLD circuit, sub-BLD circuit and analog comparator are in the OFF status.
E0C6008 (Heavy Load Protection Mode)
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC1
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage, C
1
–C
5
=0.1µF)
Characteristic
Max. Unit
Symbol
Min.
Typ.
Condition
LCD drive voltage
1/2·V
L2
V
V
L1
Connect 1 MΩ load resistor between V
DD
and V
L1
1/2·V
L2
(without panel load)
- 0.1
×0.9
V
V
L2
Connect 1 MΩ load resistor between V
DD
and V
L2
-2.30 -2.10 -1.90
(without panel load)
3/2·V
L2
3/2·V
L2
V
V
L3
Connect 1 MΩ load resistor between V
DD
and V
L3
(without panel load)
- 0.1
×0.9
BLD voltage
∗1
V
-2.35 -2.20 -2.05
V
B0
BLC="0"
V
-2.40 -2.25 -2.10
V
B1
BLC="1"
V
-2.45 -2.30 -2.15
V
B2
BLC="2"
V
-2.50 -2.35 -2.20
V
B3
BLC="3"
V
-2.55 -2.40 -2.25
V
B4
BLC="4"
V
-2.60 -2.45 -2.30
V
B5
BLC="5"
V
-2.65 -2.50 -2.35
V
B6
BLC="6"
V
-2.70 -2.55 -2.40
V
B7
BLC="7"
100
µsec
BLD circuit response time
t
B
V
-2.55 -2.40 -2.25
Sub-BLD voltage
V
BS
100
µsec
Sub-BLD circuit response time
t
BS
Non-inverted input (AMPP)
V
SS
+0.3
V
DD
-0.9 V
Analog comparator
V
IP
input voltage
V
IM
Inverted input (AMPM)
mV
Analog comparator
10
V
OF
offset voltage
msec
Analog comparator
3
t
AMP
V
IP
=-1.5V
response time
V
IM
=V
IP
±15mV
µA
Current consumption
10
20
I
OP
During HALT
Without
∗2
µA
12
25
During operation
panel load
∗1:
The relationships among V
B0
–V
B7
are V
B0
>V
B1
>V
B2
>...V
B5
>V
B6
>V
B7
.
∗2:
The BLD circuit and sub-BLD circuit are in the ON status (HLMOD="1", BLS="0").
The analog comparator is in the OFF status.
7
SEIKO [ SEIKO EPSON CORPORATION ]
