E0C6008
E0C60L08 (Normal Operating Mode)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, C
G
=25pF, VS1/VL1–VL3 are internal voltage, C
Min. Typ.
-1.15 -1.05 -0.95
1
–C
5=0.1µF)
Characteristic
LCD drive voltage
Symbol
Condition
Max. Unit
VL1
VL2
VL3
Connect 1 MΩ load resistor between VDD and VL1
V
V
V
(without panel load)
Connect 1 MΩ load resistor between VDD and VL2
2·VL1
- 0.1
3·VL1
- 0.1
2·VL1
×0.9
3·VL1
×0.9
(without panel load)
Connect 1 MΩ load resistor between VDD and VL3
(without panel load)
BLC="0"
BLC="1"
BLC="2"
BLC="3"
BLC="4"
BLC="5"
BLC="6"
BLC="7"
1
BLD voltage
VB0
VB1
VB2
VB3
VB4
VB5
VB6
VB7
-1.15 -1.05 -0.95
-1.20 -1.10 -1.00
-1.25 -1.15 -1.05
-1.30 -1.20 -1.10
-1.35 -1.25 -1.15
-1.40 -1.30 -1.20
-1.45 -1.35 -1.25
-1.50 -1.40 -1.30
V
V
V
V
V
V
V
V
BLD circuit response time
Sub-BLD voltage
t
B
100 µsec
VBS
-1.30 -1.20 -1.10
V
Sub-BLD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
t
BS
100 µsec
V
V
V
IP
Non-inverted input (AMPP)
Inverted input (AMPM)
VSS+0.3
V
DD-0.9
V
IM
OF
20
mV
Analog comparator
response time
t
AMP
V
IP=-1.1V
3
msec
V
IM=VIP±30mV
Current consumption
I
OP
During HALT
During operation
Without
panel load
1.0
2.2
2.0
4.0
µA
µA
2
1: The relationships among VB0–VB7 are VB0>VB1>VB2>...VB5>VB6>VB7
.
2: The BLD circuit, sub-BLD circuit and analog comparator are in the OFF status.
E0C60L08 (Heavy Load Protection Mode)
(Unless otherwise specified: VDD=0V, VSS=-1.5V, fOSC1=32.768kHz, Ta=25°C, C
Characteristic Symbol Condition
LCD drive voltage
G
=25pF, VS1/VL1–VL3 are internal voltage, C
Min. Typ.
-1.15 -1.05 -0.95
1
–C
5=0.1µF)
Max. Unit
VL1
VL2
VL3
Connect 1 MΩ load resistor between VDD and VL1
V
V
V
(without panel load)
Connect 1 MΩ load resistor between VDD and VL2
(without panel load)
Connect 1 MΩ load resistor between VDD and VL3
2·VL1
- 0.1
3·VL1
- 0.1
2·VL1
×0.85
3·VL1
×0.85
(without panel load)
BLC="0"
BLC="1"
BLC="2"
BLC="3"
BLC="4"
BLC="5"
BLC="6"
BLC="7"
1
BLD voltage
VB0
VB1
VB2
VB3
VB4
VB5
VB6
VB7
-1.15 -1.05 -0.95
-1.20 -1.10 -1.00
-1.25 -1.15 -1.05
-1.30 -1.20 -1.10
-1.35 -1.25 -1.15
-1.40 -1.30 -1.20
-1.45 -1.35 -1.25
-1.50 -1.40 -1.30
V
V
V
V
V
V
V
V
BLD circuit response time
Sub-BLD voltage
t
B
100 µsec
VBS
-1.30 -1.20 -1.10
V
Sub-BLD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
t
BS
100 µsec
V
V
V
IP
Non-inverted input (AMPP)
Inverted input (AMPM)
VSS+0.3
V
DD-0.9
V
IM
OF
20
mV
Analog comparator
response time
t
AMP
V
IP=-1.1V
3
msec
V
IM=VIP±30mV
Current consumption
I
OP
During HALT
During operation
Without
panel load
6.5
8.5
10
15
µA
µA
2
1: The relationships among VB0–VB7 are VB0>VB1>VB2>...VB5>VB6>VB7
.
2: The BLD circuit and sub-BLD circuit are in the ON status (HLMOD="1", BLS="0").
The analog comparator is in the OFF status.
8
SEIKO [ SEIKO EPSON CORPORATION ]
