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E0C6008F 参数 Datasheet PDF下载

E0C6008F图片预览
型号: E0C6008F
PDF下载: 下载PDF文件 查看货源
内容描述: [4-BIT, MROM, 0.038MHz, MICROCONTROLLER, PQFP100, PLASTIC, QFP15-100]
分类和应用: 时钟外围集成电路
文件页数/大小: 11 页 / 108 K
品牌: SEIKO [ SEIKO EPSON CORPORATION ]
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E0C6008  
Analog Circuit Characteristics and Current Consumption  
E0C6008 (Normal Operating Mode)  
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, C  
G
=25pF, VS1/VL1–VL3 are internal voltage, C1–C5=0.1µF)  
Characteristic  
LCD drive voltage  
Symbol  
Condition  
Min.  
1/2·VL2  
- 0.1  
Typ.  
Max. Unit  
VL1  
VL2  
VL3  
Connect 1 Mload resistor between VDD and VL1  
1/2·VL2  
×0.9  
V
V
V
(without panel load)  
Connect 1 Mload resistor between VDD and VL2  
-2.30 -2.10 -1.90  
(without panel load)  
Connect 1 Mload resistor between VDD and VL3  
3/2·VL2  
- 0.1  
3/2·VL2  
(without panel load)  
BLC="0"  
BLC="1"  
BLC="2"  
BLC="3"  
BLC="4"  
BLC="5"  
BLC="6"  
BLC="7"  
×0.9  
1
BLD voltage  
VB0  
VB1  
VB2  
VB3  
VB4  
VB5  
VB6  
VB7  
-2.35 -2.20 -2.05  
-2.40 -2.25 -2.10  
-2.45 -2.30 -2.15  
-2.50 -2.35 -2.20  
-2.55 -2.40 -2.25  
-2.60 -2.45 -2.30  
-2.65 -2.50 -2.35  
-2.70 -2.55 -2.40  
V
V
V
V
V
V
V
V
BLD circuit response time  
Sub-BLD voltage  
t
B
100 µsec  
VBS  
-2.55 -2.40 -2.25  
V
Sub-BLD circuit response time  
Analog comparator  
input voltage  
Analog comparator  
offset voltage  
t
BS  
100 µsec  
V
V
V
IP  
Non-inverted input (AMPP)  
Inverted input (AMPM)  
VSS+0.3  
V
DD-0.9  
V
IM  
OF  
10  
mV  
Analog comparator  
response time  
t
AMP  
V
V
IP=-1.5V  
IM=VIP±15mV  
3
msec  
Current consumption  
I
OP  
During HALT  
During operation  
Without  
panel load  
1.0  
2.2  
2.0  
4.0  
µA  
µA  
2
1: The relationships among VB0–VB7 are VB0>VB1>VB2>...VB5>VB6>VB7  
.
2: The BLD circuit, sub-BLD circuit and analog comparator are in the OFF status.  
E0C6008 (Heavy Load Protection Mode)  
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC1=32.768kHz, Ta=25°C, C  
Characteristic Symbol Condition  
LCD drive voltage  
G
=25pF, VS1/VL1–VL3 are internal voltage, C  
1
–C  
5=0.1µF)  
Min.  
1/2·VL2  
- 0.1  
Typ.  
Max. Unit  
VL1  
VL2  
VL3  
Connect 1 Mload resistor between VDD and VL1  
1/2·VL2  
V
V
V
(without panel load)  
Connect 1 Mload resistor between VDD and VL2  
(without panel load)  
Connect 1 Mload resistor between VDD and VL3  
×0.9  
-2.30 -2.10 -1.90  
3/2·VL2  
- 0.1  
3/2·VL2  
(without panel load)  
BLC="0"  
BLC="1"  
BLC="2"  
BLC="3"  
BLC="4"  
BLC="5"  
BLC="6"  
BLC="7"  
×0.9  
1
BLD voltage  
VB0  
VB1  
VB2  
VB3  
VB4  
VB5  
VB6  
VB7  
-2.35 -2.20 -2.05  
-2.40 -2.25 -2.10  
-2.45 -2.30 -2.15  
-2.50 -2.35 -2.20  
-2.55 -2.40 -2.25  
-2.60 -2.45 -2.30  
-2.65 -2.50 -2.35  
-2.70 -2.55 -2.40  
V
V
V
V
V
V
V
V
BLD circuit response time  
Sub-BLD voltage  
t
B
100 µsec  
VBS  
-2.55 -2.40 -2.25  
V
Sub-BLD circuit response time  
Analog comparator  
input voltage  
Analog comparator  
offset voltage  
t
BS  
100 µsec  
V
V
V
IP  
Non-inverted input (AMPP)  
Inverted input (AMPM)  
VSS+0.3  
V
DD-0.9  
V
IM  
OF  
10  
mV  
Analog comparator  
response time  
t
AMP  
V
V
IP=-1.5V  
IM=VIP±15mV  
3
msec  
Current consumption  
I
OP  
During HALT  
During operation  
Without  
panel load  
10  
12  
20  
25  
µA  
µA  
2
1: The relationships among VB0–VB7 are VB0>VB1>VB2>...VB5>VB6>VB7  
.
2: The BLD circuit and sub-BLD circuit are in the ON status (HLMOD="1", BLS="0").  
The analog comparator is in the OFF status.  
7