CF5072 series
PAD LAYOUT
(Unit: µm)
(1820,1000)
7
6
5
4
3
VDD1
OUTN
OUT
VDD2
XIN
XC
Y
NC
XR
VC
VSS1
(0,0)
X
9
10
11
12
13
1
8
2
TEST
Chip size: 1.82
×
1.00mm
Chip thickness: 300 ± 30µm
Pad size: 110
×
100µm (TEST pin only = 90
×
90µm)
Chip base: V
SS
potential
PAD DESCRIPTION AND DIMENSIONS
Pad No.
1
2
3
4
5
6
7
8
9
10
11
Name
VSS1
TEST
OE
VSS2
OUT
OUTN
VDD1
VDD2
XIN
XC
NC
I/O
–
I
Function
ina
Pad dimensions [µm]
X
Y
125
135
1283
1695
1695
1695
1695
1695
643
125
125
125
125
125
160
135
268
460
673
865
865
828
708
495
375
255
ry
VSS2
OE
DA5072
Pad size [µm]
X
110
90
110
110
110
110
110
100
110
110
110
110
110
Y
100
90
100
100
100
100
100
110
100
100
100
100
100
pre
–
I
No connection
12
XR
1
VC
13
I
Control voltage pin
1. The XR pin electrostatic withstand voltage is weaker than the other pins. The electrostatic withstand voltage of pins, excluding XR, is the same as that
for existing NPC devices.
lim
I
Output enable, with pull-up resistor built-in
–
Ground
O
O
–
–
I
ECL buffer supply
Supply
Crystal unit connection
I
Varicap anode connection
Oscillator ground
IC test pin (leave open circuit for normal operation)
Differential PECL non-inverting output (true)
Differential PECL inverting output (complementary)
Varicap cathode connection and inductor connection
NIPPON PRECISION CIRCUITS INC.—3