SS2609
Hall Latch - High Sensitivity
General Description
The SS2609 Hall effect sensor IC is fabricated from mixed signal CMOS technology. It incorporates advanced
chopper-stabilization techniques to provide accurate and stable magnetic switch points.
The circuit design provides an internally controlled clocking mechanism to cycle power to the Hall element and
analog signal processing circuits. This serves to place the high current-consuming portions of the circuit into a
“Sleep” mode. Periodically the device is “Awakened” by this internal logic and the magnetic flux from the Hall
element is evaluated against the predefined thresholds. If the flux density is above or below the Bop/Brp thresholds
then the output transistor is driven to change states accordingly. While in the “Sleep” cycle the output transistor is
latched in its previous state. The design has been optimized for service in applications requiring extended operating
lifetime in battery powered systems.
The output transistor of the SS2609 switches low (turns on) when a magnetic field perpendicular to the Hall sensor
exceeds the operate point threshold (BOP). After turn-on, the output voltage is VDS. The device remains on if the
south pole is removed (B→0). This l atching property defines the device as a magnetic memory. When the magnet-
ic field is reduced below the release point, BRP, the Output transistor turns off (goes high). The difference in the
magnetic operate and release points is the hysteresis (BHYS) of the device. This built-in hysteresis prevents output
oscillation near the switching point, and allows clean switching of the output even in the presence of external me-
chanical vibration and electrical noise.
The TSOT-23 device is reversed from the UA package. The TSOT-23 output transistor will be latched on in the
presence of a sufficiently strong North pole magnetic field applied to the marked face.
Glossary of Terms
Output level
Output level
OUT = High
OUT = High
BHYS
BHYS
OUT = Low
OUT = Low
BRP
-25Gs typ
BOP
25Gs typ
BOP
25Gs typ
BRP
-25Gs typ
0mT
0mT
Flux density
Flux density
STT package - Latch characteristic
UA package - Latch characteristic
Internal Timing Circuit
Current
Period
Iaw
Sample &
Output
Isp
Awake Taw:20μs
Sleep Tsl:600μs
Time
2
V3.10 Nov 1, 2013
SECELECTRONICS [ SEC Electronics Inc. ]
