LC78622NE
Pin Functions
Output pin states
during a reset
Pin No.
Symbol
I/O
Function
1
2
DEFI
TAI
I
I
Defect detection signal (DEF) input. (Must be connected to 0 V when unused.)
Test input. A pull-down resistor is built in. Must be connected to 0 V.
—
—
3
PDO
VVSS
ISET
VVDD
FR
O
–
Internal VCO control phase comparator output
Internal VCO ground. Must be connected to 0 V.
PDO output current adjustment resistor connection
Internal VCO power supply
—
4
—
PLL pins
5
AI
–
—
6
—
7
AI
–
VCO frequency range adjustment
—
—
8
VSS
Digital system ground. Must be connected to 0 V.
9
EFMO
EFMIN
TEST2
O
I
EFM signal output
Slice level control
Undefined
—
10
11
12
13
EFM signal input
I
Test input. A pull-down resistor is built in. Must be connected to 0 V.
—
+
CLV
O
O
Low-level output
Low-level output
Disc motor control output.
–
CLV
Three-value output is also possible when specified by microprocessor command.
Rough servo/phase control automatic switching monitor output. Outputs a high level during rough servo and
a low level during phase control.
14
V/P
O
Low-level output
15
16
17
18
19
20
21
HFL
TES
I
Track detection signal input. This is a Schmitt input.
Tracking error signal input. This is a Schmitt input.
Tracking off output
—
I
—
TOFF
TGL
O
O
O
O
O
High-level output
Undefined
Low-level output
Low-level output
Low-level output
Tracking gain switching output. Increase the gain when low.
+
JP
Track jump output.
–
JP
Three-value output is also possible when specified by microprocessor command.
PCK
EFM data playback clock monitor. Outputs 4.3218 MHz when the phase is locked.
Synchronization signal detection output. Outputs a high level when the synchronization signal detected from
the EFM signal and the internally generated synchronization signal agree.
22
FSEQ
O
–
Undefined
23
24
25
26
27
28
29
30
31
32
33
VDD
CONT1
CONT2
CONT3
CONT4
CONT5
EMPH/CONT6
C2F
Digital system power supply.
—
Input
I/O General-purpose I/O pin 1
I/O General-purpose I/O pin 2
I/O General-purpose I/O pin 3
I/O General-purpose I/O pin 4
I/O General-purpose I/O pin 5
Input
Controlled by serial data commands from the microprocessor. Any of these
that are unused must be either set up as input ports and connected to 0 V,
output ports and set up as left open.
Input
Input
Input
O
O
O
I
De-emphasis monitor pin. A high level indicates playback of a emphasis disk./general-purpose I/O port 6
Low-level output
Undefined
Undefined
—
C2 flag output
DOUT
Digital output. (EIAJ format)
TEST3
Test input. A pull-down resistor is built in. Must be connected to 0 V.
Test input. A pull-down resistor is built in. Must be connected to 0 V.
TEST4
I
—
General-purpose I/O command identification pin. A pull-down resistor is built in.
If only the same functions as those provided by the LC78622E are used, this pin must be left open or
connected to 0 V.
34
PCCL
I
—
High: Only the general-purpose I/O port commands are allowed.
Low: All commands are allowed.
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
MUTEL/CONT7
LVDD
O
–
Left channel mute output/general-purpose I/O port 7
High-level output
Left channel power supply
Left channel
—
LCHO
LVSS
O
–
one-bit D/A converter
Left channel output
—
Left channel ground. Must be connected to 0 V.
Right channel ground. Must be connected to 0 V.
Right channel output
—
RVSS
–
—
RCHO
RVDD
O
–
—
—
Right channel
one-bit D/A converter
Right channel power supply
MUTER/CONT8
XVDD
O
–
Right channel mute output/general-purpose I/O port 8
High-level output
—
Crystal oscillator power supply.
XOUT
O
I
—
Connections for a 16.9344 MHz crystal oscillator element
XIN
—
XVSS
–
Crystal oscillator ground. Must be connected to 0 V.
—
SBSY
EFLG
O
O
O
O
Subcode block synchronization signal output
Undefined
Undefined
Undefined
Undefined
C1, C2, single and double error correction monitor pin
PW
Subcode P, Q, R, S, T, U, V and W output
SFSY
Subcode frame synchronization signal output. This signal falls when the subcodes are in the standby state.
Continued on next page.
No. 6015-7/31
SANYO [ SANYO SEMICON DEVICE ]
