LC78622NE
10. Subcode Q Output Circuit; Pin 53: WRQ, pin 54: RWC, pin 55: SQOUT, pin 57: CQCK, pin 63: CS
MSB
LSB
1
Command
ADDRESS FREE
ADDRESS 1
RES = low
0
1
0
0
0
0
0
0
1
1
0
0
0
0
1
●
Subcode Q can be read from the SQOUT pin by applying a clock to the CQCKpin.
Of the eight bits in the subcode, the Q signal is used for song (track) access and display. The WRQ will be high only if
the data passed the CRC error check and the subcode Q format internal address is 1*. The control microprocessor can
read out data from SQOUT in the order shown below by detecting this high level and applying CQCK. When CQCK
is applied the DSP disables register update internally. The microprocessor should give update permission by setting
RWC high briefly after reading has completed. WRQ will fall to low at this time. Since WRQ falls to low 11.2 ms
after going high, CQCK must be applied during the high period. Note that data is read out in an LSB first format.
Note: * That state will be ignored if an address free command is input. This is provided to handle CD-ROM
applications.
Note: 1. Normally, the WRQ pin indicates the subcode Q standby state. However, it is used for a different monitoring purpose in track check mode and
during internal braking. (See the items on track counting and internal braking for details.)
2. The LC78622NE becomes active when the CS pin is low, and subcode Q data is output from the SQOUT pin. When the CS pin is high, the
SQOUT pin goes to the high-impedance state.
No. 6015-18/31
SANYO [ SANYO SEMICON DEVICE ]
