S3C70F2/C70F4/P70F4
Main Chip
S3P70F4 OTP
Table 16-1. Descriptions of Pins Used to Read/Write the EPROM
During Programming
Pin Name
Pin Name
Pin No.
I/O
Function
P6.2
SDAT
28 (30)
I/O
Serial data pin. Output port when reading and input
port when writing. Can be assigned as a Input /
push-pull output port.
P6.3
SCLK
29 (31)
4 (4)
I/O
I
Serial clock pin. Input only pin.
VPP(TEST)
TEST
Power supply pin for EPROM cell writing (indicates
that OTP enters into the writing mode). When 12.5
V is applied, OTP is in writing mode and when 5 V
is applied, OTP is in reading mode. (Option)
7 (7)
I
I
Chip initialization
RESET
RESET
VDD / VSS
VDD / VSS
Logic power supply pin. V
should be tied to +5 V
DD
30/1 (32/1)
during programming.
NOTE: ( ) means the 32-SOP OTP pin number.
Table 16-2. Comparison of S3P70F4 and S3C70F2/C70F4 Features
Characteristic S3P70F4 S3C70F2/C70F4
4 K-byte EPROM
Program Memory
2 K-byte mask ROM: S3C70F2
4 K-byte mask ROM: S3C70F4
Operating Voltage (VDD
)
2.0 V to 5.5 V
1.8 V to 5.5V
–
VDD = 5 V, VPP(TEST)=12.5V
OTP Programming Mode
Pin Configuration
30 SDIP, 32 SOP
30 SDIP, 32 SOP
EPROM Programmability
User Program one time
Programmed at the factory
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the VPP(TEST) pin of the S3P70F4, the EPROM programming mode is entered. The
operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 16–3 below.
Table 16-3. Operating Mode Selection Criteria
VDD
Vpp(TEST)
REG/MEM
ADDRESS(A15-A0)
R/W
MODE
5 V
5 V
0
0
0
1
0000H
0000H
0000H
0E3FH
1
0
1
0
EPROM read
EPROM program
EPROM verify
12.5 V
12.5 V
12.5 V
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
16-3
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