S3C4510B
ETHERNET CONTROLLER
MAC Received Pause Count Register
The received pause count register, EPZCNT, stores the current value of the 16-bit received pause counter.
Table 7-38. EPZCNT Register
Registers
EPZCNT
Offset
R/W
Description
Reset Value
0XA040
R
Pause count
0x00000000
Table 7-39. Received Pause Count Register Description
Bit Number
Bit Name
Description
[15:0]
Received pause count
(EPZCNT)
The count value indicates the number of time slots the
transmitter was paused due to the receipt of control pause
operation packets from the MAC.
MAC Remote Pause Count Register
The remote Pause count register, ERMPZCNT, stores the current value of the 16-bit remote Puase counter.
Table 7-40. ERMPZCNT Register
Registers
Offset
R/W
Description
Remote pause count
Reset Value
ERMPZCNT
0XA044
R
0x00000000
Table 7-41. Remote Pause Count Register Description
Bit Number
Bit Name
Description
[15:0]
Received pause count
(EPZCNT)
The count value indicates the number of time slots that a
remote MAC was paused as a result of its sending control
pause operation packets.
7-45
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