SYSTEM MANAGER
S3C4510B
DRAM CONTROL REGISTERS
The System Manager has four DRAM control registers, DRAMCON0–DRAMCON3. These registers correspond
to the up to four DRAM banks that are supported by S3C4510B. A fifth register, REFEXTCON, is used to set the
base pointer for external I/O bank 0.
S3C4510B supports EDO, normal, Synchronous DRAM(SDRAM). SDRAM mode can be selected by setting
SYSCFG[31]. If this bit is set to '1', all DRAM banks are selected SDRAM. Otherwise, EDO/FP DRAM banks are
selected.
Table 4-22. DRAM and External I/O Control Register Description
Registers
DRAMCON0
DRAMCON1
DRAMCON2
DRAMCON3
REFEXTCON
Offset
0x302C
0x3030
0x3034
0x3038
0x303C
R/W
R/W
R/W
R/W
R/W
R/W
Description
Reset Value
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
DRAM bank 0 control register
DRAM bank 1 control register
DRAM bank 2 control register
DRAM bank 3 control register
Refresh and external I/O control register
4-48
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