S3C4510B
INSTRUCTION SET
FORMAT 8: LOAD/STORE SIGN-EXTENDED BYTE/HALF-WORD
11
10
9
8
3
2
15
14
13
12
6
5
0
Rb
Rd
0
1
0
1
H
S
1
Ro
[2:0] Destination Register
[5:3] Base Register
[8:6] Offset Register
[10] Sign-Extended Flag
0 = Operand not sing-extended
1 = Operand sing-extended
[11] H Flag
Figure 3-37. Format 8
OPERATION
These instructions load optionally sign-extended bytes or half-words, and store half-words. The THUMB
assembler syntax is shown below.
Table 3-15. Summary of format 8 instructions
L
B
THUMB Assembler
ARM Equivalent
Action
0
0
STRH Rd, [Rb, Ro]
STRH Rd, [Rb, Ro]
Store half-word:
Add Ro to base address in Rb. Store bits 0–15 of Rd at
the resulting address.
0
1
1
0
LDRH Rd, [Rb, Ro]
LDSB Rd, [Rb, Ro]
LDRH Rd, [Rb, Ro]
Load half-word:
Add Ro to base address in Rb. Load bits 0–15 of Rd from
the resulting address, and set bits 16-31 of Rd to 0.
LDRSB Rd, [Rb, Ro] Load sign-extended byte:
Add Ro to base address in Rb. Load bits 0–7 of Rd from
the resulting address, and set bits 8-31 of Rd to bit 7.
LDRSH Rd, [Rb, Ro] Load sign-extended half-word:
1
1
LDSH Rd, [Rb, Ro]
Add Ro to base address in Rb. Load bits 0–15 of Rd from
the resulting address, and set bits 16-31 of Rd to bit 15.
3-79
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