K9F2808U0B-YCB0,YIB0
K9F2808Q0B-DCB0,DIB0
K9F2808U0B-VCB0,VIB0 K9F2808U0B-DCB0,DIB0
FLASH MEMORY
System Interface Using CE don’ t-care.
For an easier system interface, CE may be inactive during data-loading or sequential data-reading as shown below. The internal
528byte page registers are utilized as seperate buffers for this operation and the system design gets more flexible. In addition, for
voice or audio applications which use slow cycle time on the order of u-seconds, de-activating CE during the data-loading and read-
ing would provide significant saving in power consumption.
Figure 5. Program Operation with CE don’ t-care.
CLE
CE don’ t-care
CE
WE
ALE
80h
Start Add.(3Cycle)
Data Input
Data Input
10h
I/O0~7
tCS
tCH
tCEA
CE
RE
CE
tREA
tWP
WE
I/O0~7
out
Figure 6. Read Operation with CE don’ t-care.
On K9F2808U0B_Y or K9F2808U0B_V
CE must be held
CLE
CE
low during tR
CE don’ t-care
RE
ALE
tR
R/B
WE
Data Output(sequential)
00h
Start Add.(3Cycle)
I/O0~7
17