STU/D330S
S a mHop Microelectronics C orp.
Ver 1.0
N-Channel Logic Level Enhancement Mode Field Effect Transistor
PRODUCT SUMMARY
V
DSS
30V
FEATURES
Super high dense cell design for low R
DS(ON)
.
Rugged and reliable.
Suface Mount Package.
I
D
20A
R
DS(ON)
(m
Ω
) Max
28
@
VGS=10V
38
@
VGS=4.5V
G
S
G
D
S
STU SERIES
TO - 252AA( D - PAK )
STD SERIES
TO - 251 ( I - PAK )
ABSOLUTE MAXIMUM RATINGS (
T
A
=25
°
C unless otherwise noted
)
Symbol
V
DS
V
GS
I
D
I
DM
E
AS
P
D
T
J,
T
STG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current-Continuous
-Pulsed
b
d
a
Limit
30
±20
T
C
=25°C
T
C
=70°C
20
16.3
80
8.8
T
C
=25°C
T
C
=70°C
21
13.3
-55 to 150
Units
V
V
A
A
A
mJ
W
W
°C
Sigle Pulse Avalanche Energy
Maximum Power Dissipation
a
Operating Junction and Storage
Temperature Range
THERMAL CHARACTERISTICS
R
JC
R
JA
Thermal Resistance, Junction-to-Case
a
Thermal Resistance, Junction-to-Ambient
a
6
50
°C/W
°C/W
Details are subject to change without notice.
Sep,03,2008
1
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