S T G 8206
S amHop Microelectronics C orp.
Dec,27.2004 ver1.2
Dual N-C hannel E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
V
DS S
20V
F E AT UR E S
( m
W
) Max
I
D
6A
R
DS (ON)
S uper high dense cell design for low R
DS (ON
).
20 @ V
G S
= 4.5V
30 @ V
G S
= 2.5V
R ugged and reliable.
S urface Mount P ackage.
D
2
8
S
2
7
S
2
6
G
2
5
T S S OP
1
(T OP V IE W)
1
2
3
4
D
1
S
1
S
1
G
1
ABS OLUTE MAXIMUM R ATINGS (T
A
=25 C unless otherwise noted)
P arameter
Drain-S ource Voltage
Gate-S ource Voltage
Drain C urrent-C ontinuous
a
@ T
J
=25 C
b
-P ulsed
Drain-S ource Diode Forward C urrent
a
Maximum P ower Dissipation
a
Operating Junction and S torage
Temperature R ange
S ymbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
, T
S TG
Limit
20
12
6
40
2
1.5
-55 to 150
Unit
V
V
A
A
A
W
C
THE R MAL C HAR AC TE R IS TIC S
Thermal R esistance, Junction-to-Ambient
a
R
JA
85
C /W
1