S T F 8220
S amHop Microelectronics C orp.
Oct.23 2006 ver1.1
Dual N-C hannel E nhancement Mode Field E ffect Transistor
P R ODUC T S UMMAR Y
V
DS S
20V
F E AT UR E S
( m
W
) Max
I
D
7A
R
DS (ON)
20
28
S uper high dense cell design for low R
DS (ON
).
@ V
G S
= 4.0V
@ V
G S
= 2.5V
S2
S2
S2
G2
R ugged and reliable.
S urface Mount P ackage.
E S D P rotected.
Bottom Drain Contact
S1
S1
S1
4
Q1
5
6
7
Q2
Bottom Drain Contact
S2
S2
S2
G2
P IN 1
S1
S1
S1
G1
D1/D2
3
2
1
DF N 2X3
(B ottom view)
G1
8
ABS OLUTE MAXIMUM R ATINGS (T
A
=25 C unless otherwise noted)
P arameter
Drain-S ource Voltage
Gate-S ource Voltage
Drain C urrent-C ontinuous @ T
J
=25 C
-P ulsed
b
S ymbol
V
DS
V
GS
I
D
I
DM
I
S
P
D
T
J
, T
S TG
Limit
20
12
7
30
1.7
1.56
-55 to 150
Unit
V
V
A
A
A
W
C
Drain-S ource Diode Forward C urrent
a
Maximum P ower Dissipation
a
Operating Junction and S torage
Temperature R ange
THE R MAL C HAR AC TE R IS TIC S
Thermal R esistance, Junction-to-Ambient
a
R
JA
80
C /W
1