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ADV7127KR140 参数 Datasheet PDF下载

ADV7127KR140图片预览
型号: ADV7127KR140
PDF下载: 下载PDF文件 查看货源
内容描述: [PARALLEL, WORD INPUT LOADING, 10-BIT DAC, PDSO28, SOIC-28]
分类和应用: 输入元件光电二极管转换器
文件页数/大小: 17 页 / 990 K
品牌: ROCHESTER [ Rochester Electronics ]
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ADV7127  
PIN FUNCTION DESCRIPTIONS  
Pin  
Mnemonic  
Function  
CLOCK  
Clock Input (TTL Compatible). The rising edge of CLOCK latches the R0–R9, G0–G9, B0–B9, SYNC and  
BLANK pixel and control inputs. It is typically the pixel clock rate of the video system. CLOCK should be driven  
by a dedicated TTL buffer.  
D0–D9  
IOUT  
Data Inputs (TTL Compatible). Data is latched on the rising edge of CLOCK. D0 is the least significant data bit.  
Unused data inputs should be connected to either the regular PCB power or ground plane.  
Current Output. This high impedance current source is capable of directly driving a doubly terminated 75 Ω  
coaxial cable.  
RSET  
Full-Scale Adjust Control. A resistor (RSET) connected between this pin and GND controls the magnitude of the  
full-scale video signal. Note that the IRE relationships are maintained, regardless of the full-scale output current.  
The relationship between RSET and the full-scale output current on IOUT is given by:  
I
OUT (mA) = 7968 × VREF(V)/RSET()  
Compensation Pin. This is a compensation pin for the internal reference amplifier. A 0.1 µF ceramic capacitor  
must be connected between COMP and VAA  
COMP  
VREF  
.
Voltage Reference Input. An external 1.23 V voltage reference must be connected to this pin. The use of an exter-  
nal resistor divider network is not recommended. A 0.1 µF decoupling ceramic capacitor should be connected  
between VREF and VAA  
.
VAA  
Analog Power Supply (5 V ± 5%). All VAA pins on the ADV7127 must be connected.  
GND  
IOUT  
Ground. All GND pins must be connected.  
Differential Current Output. Capable of directly driving a doubly terminated 75 load. If not required, this out-  
put should be tied to ground.  
PSAVE  
Power Save Control Pin. The part is put into standby mode when PSAVE is low. The internal voltage reference  
circuit is still active on the TSSOP in this case.  
PDOWN  
Power-Down Control Pin (24-Lead TSSOP Only). The ADV7127 completely powers down, including the voltage  
reference circuit, when PDOWN is low.  
Reference Black Level  
TERMINOLOGY  
The maximum negative polarity amplitude of the video signal.  
Color Video (RGB)  
This usually refers to the technique of combining the three  
primary colors of red, green and blue to produce color pictures  
within the usual spectrum. In RGB monitors, three DACs are  
required, one for each color.  
Reference White Level  
The maximum positive polarity amplitude of the video signal.  
Video Signal  
That portion of the composite video signal which varies in gray  
scale levels between reference white and reference black. Also  
referred to as the picture signal, this is the portion that may be  
visually observed.  
Gray Scale  
The discrete levels of video signal between reference black and  
reference white levels. A 10-bit DAC contains 1024 different  
levels, while an 8-bit DAC contains 256.  
Raster Scan  
The most basic method of sweeping a CRT one line at a time to  
generate and display images.  
REV. 0  
–9–