ADM3483/ADM3485/ADM3488/ADM3490/ADM3491
Data Sheet
V
S1
CC
S3
+1.5V
–1.5V
V
CC
1kꢀ
V
ID
R
S2
R
= 110ꢀ
L
S1
2
C
L
OUT
0V OR 3V
D
2
= 50pF
C
L
1
GENERATOR
50ꢀ
1
GENERATOR
50ꢀ
1
PPR = 250kHz, 50% DUTY CYCLE, tR ≤ 6.0ns, Z = 50ꢀ.
L
O
2
C
INCLUDES PROBE AND STRAY CAPACITANCE.
1
2
PPR = 250kHz, 50% DUTY CYCLE, tR ≤ 6.0ns, Z = 50ꢀ.
L
O
C
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 25. Receiver Enable and Disable Times
Figure 23. Driver Enable and Disable Times (tPZL, tPSL, tPLZ
)
OUT
V
ID
R
1
GENERATOR
50ꢀ
2
C
= 15pF
L
1.5V
0
V
CC
V
=
OM
2
1
2
PPR = 250kHz, 50% DUTY CYCLE, tR ≤ 6.0ns, Z = 50ꢀ.
L
O
C
INCLUDES PROBE AND STRAY CAPACITANCE.
Figure 24. Receiver Propagation Delays
Rev. E | Page 12 of 20
ROCHESTER [ Rochester Electronics ]
