R3111x
TIMING CHART
Supply
Voltage
Released Voltage +V
DET
Detector Threshold -V
DET
(V
DD
)
Minimum Operating Voltage V
DDL
GND
Detector Threshold
Hysteresis
Detector Threshold
Hysteresis
Detector Threshold
Hysteresis
Output
Voltage
(V
OUT
)
Pull-up Voltage
GND
R3111xxxxA
t
PLH
R3111xxxxB
t
PLH
R3111xxxxC
t
PLH
DEFINITION OF OUTPUT DELAY TIME
Output Delay Time (t
PLH
) is defined as follows:
1. In the case of Nch Open Drain Output:(R3111xxxxA/B)
Under the condition of the output pin (OUT) is pulled up through a resistor of 470kΩ to 5V, the time interval
between the rising edge of V
DD
pulse from 0.7V to (
+
V
DET
)
+
2.0V and becoming of the output voltage to 2.5V.
2. In the case of CMOS Output:(R3111xxxxC)
The time interval between the rising edge of V
DD
pulse from 0.7V to (
+
V
DET
)
+
2.0V and becoming of the output
voltage to ((+V
DET
)+2.0V)
/
2.
+V
DET
+2.0V
Supply
Voltage
(V
DD
)
+V
DET
+2.0V
Supply
Voltage
(V
DD
)
+V
DET
+2.0V
Supply
Voltage
(V
DD
)
0.7V
GND
5.0V
0.7V
GND
5.0V
0.7V
GND
+V
DET
+2.0V
+V
DET
+2.0V
Output 2
Voltage
GND
(V
OUT
)
t
PHL
t
PLH
t
PHL
t
PLH
Output
Voltage
(V
OUT
)
2.5V
GND
t
PHL
t
PLH
Output
Voltage
(V
OUT
)
2.5V
GND
Nch Open Drain Output
(R3111xxxxA)
Nch Open Drain Output
(R3111xxxxB)
CMOS Output
(R3111xxxxC)
9