RT7278
Layout Consideration
` SW node is with high frequency voltage swing and
should be kept at small area. Keep sensitive
components away from the SW node to prevent stray
capacitive noise pickup.
Follow the PCB layout guidelines for optimal performance
of the RT7278
` Keep the traces of the main current paths as short and
wide as possible.
` Connect feedback network behind the output capacitors.
Keep the loop area small. Place the feedback
components near the RT7278 feedback pin.
` Put the input capacitor as close as possible to the device
pins (VINandGND).
` The GND and Exposed Pad should be connected to a
strong ground plane for heat sinking and noise protection.
The resistor divider must be connected
as close to the device as possible.
Input capacitor must be placed
as close to the IC as possible.
C1
C2
V
OUT
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace.
R1
8
7
6
5
EN
FB
VIN
R2
C4
C5
2
3
4
BOOT
GND
C6
GND
PVCC
SS
SW
9
L1
GND
C7
Figure 7. PCB Layout Guide
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS7278-00 January 2013
www.richtek.com
13
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