RT7278
Output Voltage Setting
inductor to achieve this goal. For the ripple current
selection, the value of ΔIL = 0.2(IMAX) will be a reasonable
starting point. The largest ripple current occurs at the
highest VIN. To guarantee that the ripple current stays
below the specified maximum, the inductor value should
be chosen according to the following equation :
The resistive divider allows the FB pin to sense the output
voltage as shown in Figure 4.
V
OUT
R1
FB
⎡
⎤ ⎡
⎤
V
OUT
V
OUT
L =
× 1−
RT7278
GND
R2
⎢
⎥ ⎢
⎥
f × ΔI
V
IN(MAX)
L(MAX)
⎣
⎦ ⎣
⎦
Input and Output Capacitors Selection
Figure 4. Output Voltage Setting
The input capacitance, CIN, is needed to filter the
trapezoidal current at the Source of the high side MOSFET.
Alow ESR input capacitor with larger ripple current rating
should be used for the maximum RMS current. The RMS
current is given by :
The output voltage is set by an external resistive divider
according to the following equation. It is recommended to
use 1% tolerance or better divider resistors.
R1
VOUT = 0.765×(1+
)
R2
V
OUT
V
IN
I
= I
−1
RMS
OUT(MAX)
V
IN
V
OUT
Under Voltage Lockout Protection
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT / 2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief.
The RT7278 has Under Voltage Lockout Protection (UVLO)
that monitors the voltage of PVCC pin. When the VPVCC
voltage is lower than UVLO threshold voltage, the RT7278
will be turned off in this state. This is non-latch protection.
Choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to
meet size or height requirements in the design. For the
input capacitor, two 10μF and 0.1μF low ESR ceramic
capacitors are recommended.
Over Temperature Protection
The RT7278 equips an Over Temperature Protection (OTP)
circuitry to prevent overheating due to excessive power
dissipation. The OTP will shut down switching operation
when junction temperature exceeds 150°C. Once the
junction temperature cools down by approximately 20°C
the main converter will resume operation. To keep operating
at maximum, the junction temperature should be prevented
from rising above 150°C.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
The output ripple, ΔVOUT, is determined by :
Inductor Selection
1
⎡
⎤
ΔVOUT ≤ ΔIL ESR +
⎢
⎣
⎥
⎦
8fCOUT
The inductor value and operating frequency determine the
ripple current according to a specific input and an output
voltage. The ripple current ΔIL increases with higher VIN
and decreases with higher inductance.
The output ripple will be highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may need to meet the ESR
and RMS current handling requirements.
V
f ×L
VOUT
V
IN
⎡
OUT ⎤ ⎡
× 1−
⎥ ⎢
⎤
ΔIL =
⎢
⎣
⎥
⎦
⎦ ⎣
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at input and
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. High frequency with small ripple current can achieve
highest efficiency operation. However, it requires a large
Copyright 2013 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
DS7278-00 January 2013
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11
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