RT7258
Table 4. Suggested Capacitors for CIN and COUT
Location
CIN
Component Supplier
Part No.
Capacitance (μF)
Case Size
1206
MURATA
TDK
GRM31CR61E106K
C3225X5R1E106K
TMK316BJ106ML
GRM31CR60J476M
C3225X5R0J476M
GRM32ER71C226M
C3225X5R1C22M
10
10
10
47
47
22
22
CIN
1206
CIN
TAIYO YUDEN
MURATA
TDK
1206
COUT
COUT
COUT
COUT
1206
1210
MURATA
TDK
1210
1210
For the input capacitor, two 10μF low ESR ceramic
capacitors are recommended. For the recommended
capacitor, please refer to Table 4 for more details.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step load change. When a
step load occurs, VOUT immediately shifts by an amount
equal to ΔILOAD x ESR also begins to charge or discharge
COUT generating a feedback error signal for the regulator
to return VOUT to its steady-state value. During this
recovery time, VOUT can be monitored for overshoot or
ringing that would indicate a stability problem.
The selection of COUT is determined by the required ESR
to minimize voltage ripple.
Moreover, the amount of bulk capacitance is also a key
for COUT selection to ensure that the control loop is stable.
Loop stability can be checked by viewing the load transient
response as described in a later section.
The output ripple, ΔVOUT , is determined by :
Thermal Considerations
1
⎡
⎤
ΔVOUT ≤ ΔIL ESR +
⎢
⎣
⎥
⎦
8fCOUT
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
The output ripple will be the highest at the maximum input
voltage since ΔIL increases with input voltage. Multiple
capacitors placed in parallel may be needed to meet the
ESR and RMS current handling requirement.
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. When a ceramic
capacitor is used at the input and the power is supplied
by a wall adapter through long wires, a load step at the
output can induce ringing at the input, VIN. This ringing
can couple to the output and be mistaken.Asudden inrush
of current through the long wires can potentially cause a
voltage spike at VIN large enough to damage the part.
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TAis
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications of
the RT7258, the maximum junction temperature is 125°C.
The junction to ambient thermal resistance, θJA, is layout
dependent. For SOP-8 (Exposed Pad) package, the
thermal resistance, θJA, is 75°C/W on a standard JEDEC
51-7 four-layer thermal test board.
Copyright 2012 Richtek Technology Corporation. All rights reserved.
©
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
14
DS7258-00 January 2012
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
