RT6541A
Ordering Information
RT6541A
Package Type
QW : WDFN-14L 3x2 (W-Type)
(Exposed Pad-Option 1)
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
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Pin Configuration
(TOP VIEW)
MODE
PGOOD
EN
LPM
BOOT
UGATE
PHASE
1
2
3
4
5
6
7
14
13
GND
15
12
11
10
9
8
CS
FB
RGND
G1
G0
VCC
LGATE
WDFN-14L 3x2
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
�½
Marking Information
0T : Product Code
0TW
W : Date Code
Functional Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 (Exposed Pad)
Pin Name
MODE
PGOOD
EN
LPM
BOOT
UGATE
PHASE
LGATE
VCC
G0
G1
RGND
FB
CS
GND
Pin Function
VCCIO/PCH_Core/EDRAM select pin.
Open drain power good indicator. High impedance indicates power is good.
PWM enable control input. Do not leave this pin floating.
Low power mode control pin.
BOOT bootstrap supply for high-side gate driver.
High-side gate driver output.
Switch node. External inductor connection for VDDQ and behave as the
current sense comparator input for Low-Side MOSFET R
DS(ON
)
sensing.
Low-side gate driver output.
Supply voltage input for the analog supply and LGATE gate driver.
2-bit input pin.
2-bit input pin.
Remote voltage sense ground pin.
Output voltage feedback input. Connect VOUT to converter output node.
Current limit threshold setting input. Connect a setting resistor to GND and
the current limit threshold is equal to 1/10 of the voltage at this pin.
Ground. The Exposed Pad must be soldered to a large PCB and connected
to GND for maximum power dissipation.
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
2
DS6541A-02
September 2019
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
