RT6218A/B
Add extra vias for thermal dissipation
GND
GND
Keep the LX node at small area
and keep analog components away
from the LX node to prevent stray
capacitive noise pickup.
CBOOT RBOOT
LX
LX
REN
1
VIN
PG
RPG
Rt
Place the feedback components next
to the FB pin.
PG
CSS
L
The VIN trace should have
enough width, and use several
vias to shunt the high input
current.
CIN2
CFF
VOUT
GND
CIN1
RFB1
RFB2
VOUT
COUT2
COUT1
Connect feedback network
behind the output
Put the input MLCC capacitors as
close to VIN pin and GND pins as
possible.
GND
Figure 9. PCB Layout Guide for TSOT-23-8 package
Copyright © 2018 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS6218A/B-01 October 2018
www.richtek.com
17
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