RT5715
Operation
The RT5715 is a low voltage synchronous step-down
converter that can support input voltage ranging from 2.5V
to 5.5V and the output current can be up to 2A. The
RT5715 uses ACOT
TM
mode control. To achieve good
stability with low-ESR ceramic capacitors, the ACOT uses
a virtual inductor current ramp generated inside the IC.
This internal ramp signal replaces the ESR ramp normally
provided by the output capacitor's ESR. The ramp signal
and other internal compensations are optimized for low-
ESR ceramic output capacitors.
In steady-state operation, the feedback voltage, with the
virtual inductor current ramp added, is compared to the
reference voltage. When the combined signal is less than
the reference, the on-time one-shot is triggered, as long
as the minimum off-time one-shot is clear and the
measured inductor current (through the synchronous
rectifier) is below the current limit. The on-time one-shot
turns on the high-side switch and the inductor current
ramps up linearly. After the on-time, the high-side switch
is turned off and the synchronous rectifier is turned on
and the inductor current ramps down linearly. At the same
time, the minimum off-time one-shot is triggered to prevent
another immediate on-time during the noisy switching
time and allow the feedback voltage and current sense
signals to settle. The minimum off-time is kept short so
that rapidly-repeated on-times can raise the inductor
current quickly when needed.
PWM Frequency and Adaptive On-Time Control
The on-time can be roughly estimated by the equation :
V
1
T
ON
=
OUT
where f
OSC
is nominal 2.7MHz
V
IN
f
OSC
Input Under-Voltage Lockout
In addition to the EN pin, the RT5715 also provides enable
control through the VIN pin. If V
EN
rises above V
EN_H
first,
switching will still be inhibited until the VIN voltage rises
above V
UVLO
. It is to ensure that the internal regulator is
ready so that operation with not-fully-enhanced internal
MOSFET switches can be prevented. After the device is
powered up, if the input voltage VIN goes below the UVLO
falling threshold voltage (V
UVLO
-
ΔV
UVLO
), this switching
Copyright
©
2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
will be inhibited; if VIN rises above the UVLO rising
threshold (V
UVLO
), the device will resume normal operation
with a complete soft-start.
Power Good Indication
The RT5715 features an open-drain power-good output
(PGOOD) to monitor the output voltage status. The output
delay of comparator prevents false flag operation for short
excursions in the output voltage, such as during line and
load transients. Pull-up PGOOD with a resistor to VOUT
or an external voltage below 5.5V. The power-good function
is activated after soft start is finished and is controlled by
a comparator connected to the feedback signal V
FB
. If
V
FB
rises above a power-good high threshold (V
TH_PGLH
)
(typically 95% of the reference voltage), the PGOOD pin
will be in high impedance and V
PG
will be held high. When
V
FB
falls short of power-good low threshold (V
TH_PGHL
)
(typically 90% of the reference voltage), the PGOOD pin
will be pulled low. Once being started-up, if any internal
protection is triggered, PGOOD will be pulled low to GND.
The internal open-drain pull-down device will pull the
PGOOD pin low. The power good indication profile is shown
below.
V
TH_PGLH
V
TH_PGHL
V
FB
V
PGOOD
www.richtek.com
4
DS5715-02
November 2019
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
