RT5112A
Addr
RegName
Bit BitName
Default Type
Description
Buck hiccup or latch off mode selection after VO UV.
0 : Hiccup mode; (continouously hiccup more than 3
times would enter latch-off mode ,select deglitch
time by REG0x38[7:6], hiccup on/off time = 5/8ms)
(default)
BUCK_UV
_LATCH
7
0
0
0
RW
RW
RW
1 : Latch-off mode
LDO hiccup or latch off mode selection after VO UV.
0 : Hiccup mode; (continouously hiccup more than 3
times would enter latch-off mode ,select deglitch
time by REG0x38[3:2], hiccup on/off time = 5/40ms)
(default)
LDO_UV_
LATCH
6
1 : Latch-off mode
Boost hiccup or latch off mode selection after VO UV.
0 : Hiccup mode; (continouously hiccup more than 3
times would enter latch-off mode ,select deglitch
time by REG0x37[3:2], hiccup on/off time =
11/100ms) (default)
BOOST_U
V_LATCH
5
1 : Latch-off mode
IC protection after thermal shutdown :
00 : Manual recovery after TSD with reset I2C
register. The power up sequence is initiated with
default I2C register value
0x0A
Latch
01 : Auto recovery after TSD with no reset I2C
register. The power up sequence is initiated with I2C
register value (default)
4:3
TSD[1:0]
01
RW
10 : Latch off after TSD, all Reg reset. Restart by Vin
start up or (BSTEN = 0 → 1 to restart Boost) or
(HWEN = 0 → 1 to eanble channel), i.e.BSTEN and
HWEN need pull low to unlock
11 : No change, follow before setting
Buck discharge or latch off mode selection after VO
BUCK_OV
_LATCH
OV.
2
0
RW
RW
0 : R Discharge (default)
1: Latch-off mode
LDO discharge mode selection after VO OV.
0 : R Discharge; (During DVS period won't sent OV
Event to INTRB) (default)
LDO_OV_
LATCH
1
0
0
0
1 : NA
Boost latch off mode selection after VO OV.
RW 0 : NA (default)
1 : Latch-off mode
BOOST_O
V_LATCH
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42
DS5112A-02 August 2019