RT3668EB
Functional Pin Description
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
Pin Name
PGOOD
EN
VIN
RGND
COMP
FB
ISEN2P
ISEN2N
VSEN
ISEN1P
ISEN1N
VRHOT_L
Pin Function
Power good indicator for the GFX controller. This pin is an open drain output.
Controller enable input pin.
VIN input pin. Connect a low pass filter to this pin.
Return ground of GFX controller. This pin is the common negative input of
output voltage differential remote sense of GFX controller.
Error amplifier output pin of the GFX controller.
Output voltage feedback input of GFX controller. This pin is the negative input
of the error amplifier for the GFX controller.
Positive current sense input of phase 2 for GFX controller.
Negative current sense input of Phase 2 for GFX controller.
GFX controller voltage sense input. This pin is connected to the terminal of
GFX controller output voltage.
Positive current sense input of phase 1 for GFX controller.
Negative current sense input of phase 1 for GFX controller.
Thermal indicator. This pin is an open drain output. (Active low)
This pin provides two functions: Platform Setting, Platform can use this pin
to set frequency, initial offset and per-phase OCP threshold of GFX
Controller. The other function is thermal sense input for VRHOT indicator, so
this pin must to be connected to the NTC network for thermal sense.
Platform setting pin. Platform can use this pin to set AI gain, QRTH of GFX
Controller.
Current monitor output for the GFX controller. This pin outputs a voltage
proportional to the output current.
13
TSEN
14
15
SET1
IMON
16
This pin provides two functions : the 3.2V power supply for pin setting
function divided resistors. The other function is fixed 0.8V output reference
VREF_PINSET voltage, and the voltage is only used to offset the output voltage of IMON pin.
Connect a RC circuit from this pin to GND. The recommended resistor is from
3.9 to 10, and the capacitor is 0.47F.
VCC
Controller power supply. Connect this pin to 5V and place a decoupling
capacitor 2.2F at least. The decoupling capacitor is as close controller as
possible.
System power good input. If PWROK is low, the SVI interface is disabled and
VR returns to BOOT-VID state with initial load-line slope and initial offset. If
PWROK is high, the SVI interface is running and the DAC decodes
the
received serial VID codes to determine the output voltage.
Serial VID clock input.
Serial VID data input. This pin is a serial data line.
Serial VID telemetry output from VR. This pin is a push-pull output.
Processor memory interface power rail and serves as the reference for
PWROK, SVD, SVC and SVT. This pin is used by the VR to reference the
SVI pins.
No internal connection.
17
18
PWROK
19
20
21
22
23
SVC
SVD
SVT
VDDIO
NC
Copyright © 2019 Richtek Technology Corporation. All rights reserved.
is a registered trademark of Richtek Technology Corporation.
DS3668EB-05
August 2019
www.richtek.com
3
RICHTEK [ RICHTEK TECHNOLOGY CORPORATION ]
