RF2513
RF2513 Theory of Operation
Introduction
In addition to the DIV CTRL setting, one also sets the
prescaler modulus by setting pin 14 (MOD CTRL)
either high or low. A high logic level will select the 64/
128 divisor. A low logic level will select the 65/129 divi-
sor.
The RF2513 is a low-cost FM/FSK UHF transmitter
designed for applications operating within the 300MHz
to 1000MHz frequency range. It is particularly intended
for 315/433/868MHz band systems, remote keyless
entry systems, and FCC Part 15.231 periodic transmit-
ters. It can also be used as a single- or dual-channel
local oscillator signal source. The integrated VCO,
phase detector, prescaler, and reference oscillator
require only the addition of an external crystal to pro-
vide a complete phase-locked loop.
Pin 12 (PRESCL OUT) provides access to the pres-
caler output. This is used for interfacing to an external
PLL IC.
The RF2513 contains an onboard phase detector and
charge pump. The phase detector compares the
phase of the reference oscillator to the phase of the
VCO. The phase detector is implemented using flip-
flops in a topology referred to as either “digital phase/
frequency detector” or “digital tri-state comparator”.
The circuit consists of two D flip-flops whose outputs
are combined with a NAND gate which is then tied to
the reset on each flip-flop. The outputs of the flip-flops
are also connected to the charge pump. Each flip-flop
output signal is a series of pulses whose frequency is
related to the flip-flop input frequency.
The RF2513 is provided in a 24-pin SSOP-24 package
and is designed to operate from a supply voltage rang-
ing from 2.2V to 5.0V, accommodating designs using
three NiCd battery cells, two AAA flashlight cells, or a
lithium button battery. The device is capable of provid-
ing up to 10mW output power into a 50Ω load
(+10dBm) and is intended to comply with FCC require-
ments for unlicensed remote control transmitters.
RF2513 Functional Blocks
A PLL consists of a reference oscillator, phase detec-
tor, loop filter, voltage controlled oscillator (VCO), and
a programmable divider in the feedback path. The
RF2513 includes all of these internally, except for the
loop filter and the reference oscillator’s crystal and two
feedback capacitors.
When both inputs of the flip-flops are identical, the sig-
nals are both frequency and phase locked. If they are
different, they will provide signals to the charge pump
which will either charge or discharge the loop filter or
enter into a high impedance state. This is where the
name “tri-state comparator” comes from.
The reference oscillators are Colpitts type oscillators.
Pins 1 (OSC B2), 2 (OSC E), and 3 (OSC B1) provide
connections to the internal transistors used as refer-
ence oscillators. The Colpitts configuration is a low
parts-count topology with reliable performance and
reasonable phase noise. Alternatively, an external sig-
nal could be injected into the base of either transistor.
In either case, the drive level should be around
500mVPP. This level prevents overdriving the device
11
The main benefit of this type of detector it’s ability to
correct for errors in both phase and frequency. When
locked, the detector uses phase error for correction.
When unlocked, it will use the frequency error for cor-
rection. This type of detector will lock under all condi-
tions.
The prescaler and the phase detector bias voltage is
brought out through pin 13 (VREF P). This allows
bypassing of the of these two circuits to filter the refer-
ence crystal frequency.
and keeps phase noise and reference spurs minimal.
The user sets which oscillator is operational by setting
pin 24 (OSC SEL) either high or low. This allows the
implementation of two channel systems.
The charge pump consists of two transistors, one for
charging the loop filter and the other for discharging
the loop filter. It’s inputs are the outputs of the phase
detector flip-flops. Since there are two flip-flops, there
are four possible states. If both amplifier inputs are low,
then the amplifier pair goes into a high impedance
state, maintaining the charge on the loop filter. The
state where both inputs are high will not occur. The
other states are either charging or discharging the loop
filter. The loop filter integrates the pulses coming from
The prescaler divides the Voltage Controlled Oscilla-
tor (VCO) frequency down by either 64/65 or 128/129,
using a series of flip-flops, depending upon the logic
level present at pin 15 (DIV CTRL). A high logic level
will select the 64/65 divisor. A low logic level will select
the 128/129 divisor. This divided signal is then fed into
the phase detector where it is compared with the refer-
ence frequency.
Rev B8 010509
11-27
RFMD [ RF MICRO DEVICES ]
