Preliminary
RF2196
Application Schematic
US - CDMA
RF IN
Matching network for
optimum input return loss
15 pF
2
Interstage tuning for centering
frequency response
3.6 pF
Bypassing for
REG1 and VREG2
RF Choke - Bias inductor
for the amplifier interstage
V
TL4
1 µF
15 pF
+
Bypassing for VCC
1
16
15 14
13
Jumper
11 pF
TL3
10 nF
VREG
2
3
4
12
11
10
Jumper
Ferrite
10 Ω
+
1 kΩ
1 µF
VMODE
VCC
15 pF
15 pF
5
6
7
8
9
TL1
Bias return
4.7 pF
2.5 nH
2.2 pF
12 nH
TL2
15 pF
10 nF
4.7 µF
Matching network for
optimum load impedance
2.2 pF
15 pF
Transmission
Pins 1 and 9 are internally grounded to the die flag.
Line Length
TL1
TL2
TL3
TL4
RF OUT
CDMA (US)
30 mils 140 mils 15 mils 200 mils
Rev A0 010518
2-207
RFMD [ RF MICRO DEVICES ]
