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RF2196PCBA 参数 Datasheet PDF下载

RF2196PCBA图片预览
型号: RF2196PCBA
PDF下载: 下载PDF文件 查看货源
内容描述: 3V PCS线性功率放大器 [3V PCS LINEAR POWER AMPLIFIER]
分类和应用: 放大器功率放大器过程控制系统PCS
文件页数/大小: 8 页 / 182 K
品牌: RFMD [ RF MICRO DEVICES ]
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Preliminary  
RF2196  
Pin  
1
Function Description  
Interface Schematic  
This pin is internally grounded to the die flag.  
GND  
Power Down control for first stage. Regulated voltage supply for ampli-  
2
VREG1  
fier bias. In Power Down mode, both V  
and V  
need to be LOW  
REG  
MODE  
(<0.5V).  
For nominal operation (High Gain Mode), V  
HIGH, the driver and final are dynamically scaled to reduce the device  
size and as a result to reduce idle current.  
is set LOW. When set  
3
4
MODE  
MODE  
2
Power Down control for the second stage. Regulated voltage supply for  
amplifier bias. In Power Down mode, both V  
VREG2  
and V  
need to be  
REG  
MODE  
LOW (<0.5V).  
Connect to ground plane via 15nH inductor. DC return for the second  
stage bias circuit.  
5
6
GND  
NC  
This pin has no internal bonding; therefore, this pin can be connected  
to output pin 7, connected to the ground plane, or not connected. Slight  
tuning of the output match may be required due to stray capacitance of  
the pin.  
RF output and power supply for final stage. This is the unmatched col-  
lector output of the second stage. A DC block is required following the  
matching components. The biasing may be provided via a parallel L-C  
set for resonance at the operating frequency of 1710MHz to 1910MHz.  
It is important to select an inductor with very low DC resistance with a  
1A current rating. Alternatively, shunt microstrip techniques are also  
applicable and provide very low DC resistance. Low frequency bypass-  
ing is required for stability.  
7
RF OUT  
RF OUT  
From Bias  
Network  
Same as pin 7.  
See pin 7.  
8
9
RF OUT  
GND  
This pin is internally grounded to the die flag.  
Supply for bias reference and control circuits. High frequency bypass-  
ing may be necessary.  
10  
VCC  
Power supply for first stage and interstage match. Pins 11 and 12  
should be connected by a common trace where the pins contact the  
printed circuit board.  
11  
VCC1  
Same as pin 11.  
12  
13  
VCC1  
NC  
It is recommended that these pins be connected to the ground plane for  
improved isolation between RF IN (pin 16) and the VCC1 pins (pins 11  
and 12).  
It is recommended that these pins be connected to the ground plane for  
improved isolation between RF IN (pin 16) and the VCC1 pins (pins 11  
and 12).  
14  
15  
16  
NC  
NC  
It is recommended that these pins be connected to the ground plane for  
improved isolation between RF IN (pin 16) and the VCC1 pins (pins 11  
and 12).  
RF input. An external 15pF series capacitor is required as a DC block.  
In addition, the matching circuit shown is required to improve input  
VSWR.  
RF IN  
VCC1  
15 pF  
TL  
RF IN  
3.6 pF  
GND1  
From  
Bias  
Stages  
Ground connection. The backside of the package should be soldered to  
a top side ground pad which is connected to the ground plane with mul-  
tiple vias. The pad should have a short thermal path to the ground  
plane.  
Pkg  
Base  
GND  
2-206  
Rev A0 010518  
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