5 Data Transfer Modes
The TRC104 supports two data transfer modes - Continuous Data Mode and Burst Data Mode. The data transfer
mode is selected by the D_Mode bit in configuration register 0x02.
5.1 Continuous Data Mode
Continuous Data Mode is selected when the D_Mode bit of register 0x02 is set to 0. Continuous Receive Mode
routes demodulated data directly to the SDAT pin and the associated clock to the SCLK pin. In Continuous
transmit mode the data bit stream is applied directly to the SDAT pin. The internal FIFOs and the automatic
packet features are disabled in Continuous Data Mode. It is the responsibility of the TRC104 host microcontroller
to handle these functions.
5.1.1 Continuous Transmit Mode
Continuous Transmit Mode is enabled when the C_Mode bit of register 0x00 is set to 1 and the D_Mode bit of
register 0x02 is set to 0. In Continuous Transmit Mode, the transmit FIFO and all automatic packet features
including preamble generation, addressing, DC-balanced data scrambling and CRC generation are disabled. The
TRC104 host microcontroller must handle these functions for Continuous Transmit Mode. Specifically, the host
microcontroller must generate a 1-0-1-0 … preamble sequence of at least 16 bits followed immediately by the
destination address for the transmission (called the sender or local device address at the destination node).
Also for this mode, it is the responsibility of the host microcontroller to maintain correct bit timing to an accuracy of
1% as there is no bit clock output for transmit timing. The host microcontroller must be powerful enough to
accurately support the selected serial data rate (250 kb/s or 1 Mb/s) in addition to other functions required for the
end application. Figure 11and Table 10 show the timing for transmitting data on SDAT. Note that three 1 dummy
bits must be sent prior to sending the preamble and the rest of the packet.
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Figure 11
Item Description
Min Typ Max Unit
T1
T2
T3
MODE to 1st Bit Time
250
3
µs
bit
Dummy Bits
RF Transmission Time
4
ms
Table 10
The TRC104 should not be active for more than 4 ms at a time to allow for internal auto-calibration. Typical
calibration time is 200 µs.
5.1.2 Continuous Receive Mode
Continuous Receive Mode is enabled when the C_Mode bit of register 0x00 is set to 0 and the D_Mode bit of
register 0x02 is set to 0. In Continuous Receive Mode, the receive FIFO and automatic packet features except
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TRC104 - 08/13/09
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