R32C/118 Group
1. Overview
1.4
Pin Assignments
Figure 1.3 and Figure 1.4 show the pin assignments (top view) and Table 1.6 to Table 1.12 show the pin
characteristics.
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
IIO0_0 / IIO1_0 / D8 / P1_0
AN0_7 / D7 / P0_7
AN0_6 / D6 / P0_6
AN0_5 / D5 / P0_5
AN0_4 / D4 / P0_4
WR3 / BC3 / P11_4
IIO1_3 / RTS8 / CTS8 / WR2 / CS3 / P11_3
IIO1_2 / RXD8 / CS2 / P11_2
IIO1_1 / CLK8 / CS1 / P11_1
IIO1_0 / TXD8 / CS0 / P11_0
AN0_3 / D3 / P0_3
AN0_2 / D2 / P0_2
AN0_1 / D1 / P0_1
AN0_0 / D0 / P0_0
IIO0_7 / RTS6 / CTS6 / SS6 / AN15_7 / P15_7
IIO0_6 / CLK6 / AN15_6 / P15_6
IIO0_5 / RXD6 / SCL6 / STXD6 / AN15_5 / P15_5
IIO0_4 / TXD6 / SDA6 / SRXD6 / AN15_4 / P15_4
IIO0_3 / RTS7 / CTS7 / AN15_3 / P15_3
IIO0_2 / RXD7 / AN15_2 / P15_2
IIO0_1 / CLK7 / AN15_1 / P15_1
VSS
IIO0_0 / TXD7 / AN15_0 / P15_0
VCC
KI3 / AN_7 / P10_7
KI2 / AN_6 / P10_6
KI1 / AN_5 / P10_5
KI0 / AN_4 / P10_4
AN_3 / P10_3
AN_2 / P10_2
AN_1 / P10_1
AVSS
AN_0 / P10_0
VREF
AVCC
STXD4 / SCL4 / RXD4 / ADTRG / P9_7
73
P1_1 / D9 / IIO0_1 / IIO1_1
P1_2 / D10 / IIO0_2 / IIO1_2
P1_3 / D11 / IIO0_3 / IIO1_3
P1_4 / D12 / IIO0_4 / IIO1_4
P1_5 / D13 / INT3 / IIO0_5 / IIO1_5
P1_6 / D14 / INT4 / IIO0_6 / IIO1_6
P1_7 / D15 / INT5 / IIO0_7 / IIO1_7
P2_0 / A0 / [A0/D0] / BC0 / [BC0/D0] / AN2_0
P2_1 / A1 / [A1/D1] / BC2 / [BC2/D1] / AN2_1
P2_2 / A2 / [A2/D2] / AN2_2
P2_3 / A3 / [A3/D3] / AN2_3
P2_4 / A4 / [A4/D4] / AN2_4
P2_5 / A5 / [A5/D5] / AN2_5
P2_6 / A6 / [A6/D6] / AN2_6
P2_7 / A7 / [A7/D7] / AN2_7
VSS
P3_0 / A8 / [A8/D8] / TA0OUT / UD0A / UD1A
VCC
P12_0 / D16 / TXD6 / SDA6 / SRXD6
P12_1 / D17 / CLK6
P12_2 / D18 / RXD6 / SCL6 / STXD6
P12_3 / D19 / CTS6 / RTS6 / SS6
P12_4 / D20
P3_1 / A9 / [A9/D9] / TA3OUT / UD0B / UD1B
P3_2 / A10 / [A10/D10] / TA1OUT / V
P3_3 / A11 / [A11/D11] / TA1IN / V
P3_4 / A12 / [A12/D12] / TA2OUT / W
P3_5 / A13 / [A13/D13] / TA2IN / W
P3_6 / A14 / [A14/D14] / TA4OUT / U
P3_7 / A15 / [A15/D15] / TA4IN / U
P4_0 / A16 / CTS3 / RTS3 / SS3
P4_1 / A17 / CLK3
VSS
P4_2 / A18 / RXD3 / SCL3 / STXD3 / ISRXD2 / IEIN
VCC
P4_3 / A19 / TXD3 / SDA3 / SRXD3 / OUTC2_0 / ISTXD2 / IEOUT
(Note 1)
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
72
71
70
69
68
67
66
65
64
63
62
61
60
R32C/118 GROUP
PLQP0144KA-A
(144P6Q-A)
(Top view)
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
P4_4 / CS3 / A20 / CTS6 / RTS6 / SS6
P4_5 / CS2 / A21 / CLK6
P4_6 / CS1 / A22 / RXD6 / SCL6 / STXD6
P4_7 / CS0 / A23 / TXD6 / SDA6 / SRXD6
P12_5 / D21
P12_6 / D22
P12_7 / D23
P5_0 / WR0 / WR
P5_1 / WR1 / BC1
P5_2 / RD
P5_3 / CLKOUT / BCLK
P13_0 / D24 / OUTC2_4
P13_1 / D25 / OUTC2_5
VCC
P13_2 / D26 / OUTC2_6
(Note 2)
VSS
P13_3 / D27 / OUTC2_3
P5_4 / HLDA / CS1 / TXD7
P5_5 / HOLD / CLK7
P5_6 / ALE / CS2 / RXD7
P5_7 / RDY / CS3 / CTS7 / RTS7
P13_4 / D28 / OUTC2_0 / ISTXD2 / IEOUT
P13_5 / D29 / OUTC2_2 / ISRXD2 / IEIN
P13_6 / D30 / OUTC2_1 / ISCLK2
P13_7 / D31 / OUTC2_7
P6_0 / TB0IN / CTS0 / RTS0 / SS0
P6_1 / TB1IN / CLK0
P6_2 / TB2IN / RXD0 / SCL0 / STXD0
P6_3 / TXD0 / SDA0 / SRXD0
P6_4 / CTS1 / RTS1 / SS1 / OUTC2_1 / ISCLK2
P6_5 / CLK1
VSS
P6_6 / RXD1 / SCL1 / STXD1
VCC
P6_7 / TXD1 / SDA1 / SRXD1
P7_0 / TA0OUT / TXD2 / SDA2 / SRXD2 / IIO1_6 / OUTC2_0 / ISTXD2 / IEOUT / MSDA
(Note 3)
1
2
3
4
5
6
7
8
Notes:
1. Pin names in brackets [ ] represent a functional signal as a whole and should not be considered as two separate pins.
2. The following pins are 5 V tolerant inputs: P4_0 to P4_7, P5_4 to P5_7, P6_0 to P6_7, P7_0 to P7_7, and P8_0 to P8_3
3. The position of pin number 1 varies by product. Refer to the index mark in attached “Package Dimensions”.
Figure 1.3
Pin Assignment for the 144-pin Package (top view)
REJ03B0255-0100 Rev.1.00 Nov 19, 2009
Page 9 of 122
CAN1OUT / SRXD4 / SDA4 / TXD4 / ANEX1 / P9_6
CAN1IN / CAN1WU / CLK4 / ANEX0 / P9_5
SS4 / RTS4 / CTS4 / TB4IN / DA1 / P9_4
SS3 / RTS3 / CTS3 / TB3IN / DA0 / P9_3
IEOUT / ISTXD2 / OUTC2_0 / SRXD3 / SDA3 / TXD3 / TB2IN / P9_2
IEIN / ISRXD2 / STXD3 / SCL3 / RXD3 / TB1IN / P9_1
CLK3 / TB0IN / P9_0
INT8 / P14_6
INT7 / P14_5
INT6 / P14_4
P14_3
VDC0
P14_1
VDC1
NSD
CNVSS
XCIN / P8_7
XCOUT / P8_6
RESET
XOUT
VSS
XIN
VCC
NMI / P8_5
INT2 / P8_4
CAN0IN / CAN0WU / CAN1IN / CAN1WU / INT1 / P8_3
CAN0OUT / CAN1OUT / INT0 / P8_2
UD0B / UD1B / IIO1_5 / RTS5 / CTS5 / SS5 / U / TA4IN / P8_1
UD0A / UD1A / RXD5 / SCL5 / STXD5 / U / TA4OUT / P8_0
CAN0IN / CAN0WU / UD0B / UD1B / IIO1_4 / CLK5 / TA3IN / P7_7
CAN0OUT / UD0A / UD1A / IIO1_3 / RTS8 / CTS8 / TXD5 / SDA5 / SRXD5 / TA3OUT / P7_6
IIO1_2 / RXD8 / W / TA2IN / P7_5
IIO1_1 / CLK8 / W / TA2OUT / P7_4
IIO1_0 / TXD8 / SS2 / RTS2 / CTS2 / V / TA1IN / P7_3
CLK2 / V / TA1OUT / P7_2
MSCL / IEIN / ISRXD2 / OUTC2_2 / IIO1_7 / STXD2 / SCL2 / RXD2 / TA0IN / TB5IN / P7_1
9
RENESAS [ RENESAS TECHNOLOGY CORP ]
