R32C/118 Group
1. Overview
(Note 1)
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IIO0_2 / IIO1_2 / D10 / P1_2
P4_2 / A18 / RXD3 / SCL3 / STXD3 / ISRXD2 / IEIN
P4_3 / A19 / TXD3 / SDA3 / SRXD3 / OUTC2_0 / ISTXD2 / IEOUT
P4_4 / CS3 / A20 / CTS6 / RTS6 / SS6
P4_5 / CS2 / A21 / CLK6
IIO0_1 / IIO1_1 / D9 / P1_1
IIO0_0 / IIO1_0 / D8 / P1_0
AN0_7 / D7 / P0_7
AN0_6 / D6 / P0_6
P4_6 / CS1 / A22 / RXD6 / SCL6 / STXD6
P4_7 / CS0 / A23 / TXD6 / SDA6 / SRXD6
P5_0 / WR0 / WR
AN0_5 / D5 / P0_5
AN0_4 / D4 / P0_4
AN0_3 / D3 / P0_3
P5_1 / WR1 / BC1
AN0_2 / D2 / P0_2
P5_2 / RD
AN0_1 / D1 / P0_1
P5_3 / CLKOUT / BCLK
R32C/118 GROUP
(Note 2)
AN0_0 / D0 / P0_0
P5_4 / HLDA / CS1 / TXD7
P5_5 / HOLD / CLK7
KI3 / AN_7 / P10_7
KI2 / AN_6 / P10_6
P5_6 / ALE / CS2 / RXD7
KI1 / AN_5 / P10_5
PLQP0100KB-A
(100P6Q-A)
(Top view)
P5_7 / RDY / CS3 / CTS7 / RTS7
P6_0 / TB0IN / CTS0 / RTS0 / SS0
P6_1 / TB1IN / CLK0
KI0 / AN_4 / P10_4
AN_3 / P10_3
AN_2 / P10_2
P6_2 / TB2IN / RXD0 / SCL0 / STXD0
P6_3 / TXD0 / SDA0 / SRXD0
P6_4 / CTS1 / RTS1 / SS1 / OUTC2_1 / ISCLK2
P6_5 / CLK1
AN_1 / P10_1
AVSS
AN_0 / P10_0
VREF
P6_6 / RXD1 / SCL1 / STXD1
P6_7 / TXD1 / SDA1 / SRXD1
AVCC
STXD4 / SCL4 / RXD4 / ADTRG / P9_7
CAN1OUT / SRXD4 / SDA4 / TXD4 / ANEX1 / P9_6
CAN1IN / CAN1WU / CLK4 / ANEX0 / P9_5
P7_0 / TA0OUT / TXD2 / SDA2 / SRXD2 / IIO1_6 / OUTC2_0 / ISTXD2 / IEOUT / MSDA
P7_1 / TB5IN / TA0IN / RXD2 / SCL2 / STXD2 / IIO1_7 / OUTC2_2 / ISRXD2 / IEIN / MSCL
P7_2 / TA1OUT / V / CLK2
(Note 3)
Notes:
1. Pin names in brackets [ ] represent a functional signal as a whole and should not be considered as two separate pins.
2. The following pins are 5 V tolerant inputs: P4_0 to P4_7, P5_4 to P5_7, P6_0 to P6_7, P7_0 to P7_7, and P8_0 to P8_3
3. The position of pin number 1 varies by product. Refer to the index mark in attached “Package Dimensions”.
Figure 1.4
Pin Assignment for the 100-pin Package (top view)
REJ03B0255-0100 Rev.1.00 Nov 19, 2009
Page 14 of 122
RENESAS [ RENESAS TECHNOLOGY CORP ]
