Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
12. Interrupts
12.7
Interrupts of Timer RC, Timer RD, Timer RG, Synchronous Serial Communication
Unit, I
2
C bus Interface, and Flash Memory (Interrupts with Multiple Interrupt
Request Sources)
The interrupts of timer RC, timer RD (timer RD0) interrupt, timer RD (timer RD1), timer RG, the synchronous
serial communication unit, the I
2
C bus interface, and the flash memory each have multiple interrupt request
sources. An interrupt request is generated by the logical OR of several interrupt request sources and is reflected in
the IR bit in the corresponding interrupt control register. Therefore, each of these peripheral functions has its own
interrupt request source status register (status register) and interrupt request source enable register (enable register)
to control the generation of interrupt requests (change of the IR bit in the interrupt control register). Table 12.10
lists the Registers Associated with Interrupts of Timer RC, Timer RD, Timer RG, Synchronous Serial
Table 12.10
Registers Associated with Interrupts of Timer RC, Timer RD, Timer RG, Synchronous
Serial Communication Unit, I
2
C bus Interface, and Flash Memory
Status Register of
Interrupt Request Source
TRCSR
TRDSR0
TRDSR1
TRGSR
SSSR
Peripheral Function
Name
Timer RC
Timer RD Timer RD0
Timer RD1
Timer RG
Synchronous serial
communication unit
I
2
C bus interface
Flash memory
Enable Register of
Interrupt Request
Source
TRCIER
TRDIER0
TRDIER1
TRGIER
SSER
ICIER
RDYSTIE
BSYAEIE
CMDERIE
Interrupt Control
Register
TRCIC
TRD0IC
TRD1IC
TRGIC
SSUIC
IICIC
FMRDYIC
ICSR
RDYSTI
BSYAEI
Timer RD i
IMFA bit
IMIEA bit
IMFB bit
IMIEB bit
IMFC bit
IMIEC bit
IMFD bit
IMIED bit
UDF bit
OVF bit
OVIE bit
Timer RD i
interrupt request
(IR bit in TRDiIC register)
i = 0 or 1
IMFA, IMFB, IMFC, IMFD, OVF, UDF: Bits in TRDSRi register
IMIEA, IMIEB, IMIEC, IMIED, OVIE: Bits in TRDIER register
Figure 12.12
Block Diagram of Timer RD Interrupt
REJ09B0441-0010 Rev.0.10
Page 197 of 809
Jul 30, 2008
RENESAS [ RENESAS TECHNOLOGY CORP ]
