Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
12. Interrupts
12.2.2
Interrupt Control Register
(FMRDYIC, TRCIC, TRD0IC, TRD1IC, SSUIC/IICIC, TRGIC)
Address 0041h (FMRDYIC), 0047h (TRCIC), 0048h (TRD0IC), 0049h (TRD1IC),
004Fh (SSUIC/IICIC (Note 1)), 006Bh (TRGIC)
Bit
b7
b6
b5
b4
b3
b2
b1
Symbol
After Reset
X
X
X
X
X
0
0
Bit
b0
b1
b2
Symbol
Bit Name
ILVL0 Interrupt priority level select bit
ILVL1
ILVL2
Function
b2 b1 b0
b0
0
R/W
R/W
R/W
R/W
b3
b4
b5
b6
b7
IR
—
—
—
—
0 0 0: Level 0 (interrupt disabled)
0 0 1: Level 1
0 1 0: Level 2
0 1 1: Level 3
1 0 0: Level 4
1 0 1: Level 5
1 1 0: Level 6
1 1 1: Level 7
Interrupt request bit
0: No interrupt requested
1: Interrupt requested
Nothing is assigned. If necessary, set to 0. When read, the content is undefined.
R/W
—
Note:
1. Selectable by the IICSEL bit in the SSUIICSR register.
Rewrite the interrupt control register when an interrupt request corresponding to the register is not generated.
Refer to
REJ09B0441-0010 Rev.0.10
Page 175 of 809
Jul 30, 2008
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